ZHCS762F December   2011  – May 2017 TRF7963A

PRODUCTION DATA.  

  1. 1器件概述
    1. 1.1 特性
    2. 1.2 应用
    3. 1.3 说明
    4. 1.4 应用框图
  2. 2修订历史记录
  3. 3Device Characteristics
    1. 3.1 Related Products
  4. 4Terminal Configuration and Functions
    1. 4.1 Pin Diagrams
    2. 4.2 Signal Descriptions
  5. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Electrical Characteristics
    5. 5.5 Thermal Resistance Characteristics
    6. 5.6 Switching Characteristics
  6. 6Detailed Description
    1. 6.1  Functional Block Diagram
    2. 6.2  Power Supplies
    3. 6.3  Supply Arrangements
    4. 6.4  Supply Regulator Settings
    5. 6.5  Power Modes
    6. 6.6  Receiver – Analog Section
      1. 6.6.1 Main and Auxiliary Receiver
      2. 6.6.2 Receiver Gain and Filter Stages
    7. 6.7  Receiver – Digital Section
      1. 6.7.1 Received Signal Strength Indicator (RSSI)
        1. 6.7.1.1 Internal RSSI – Main and Auxiliary Receivers
        2. 6.7.1.2 External RSSI
    8. 6.8  Oscillator Section
    9. 6.9  Transmitter - Analog Section
    10. 6.10 Transmitter - Digital Section
    11. 6.11 Transmitter – External Power Amplifier or Subcarrier Detector
    12. 6.12 Communication Interface
      1. 6.12.1 General Introduction
      2. 6.12.2 FIFO Operation
      3. 6.12.3 Parallel Interface Mode
      4. 6.12.4 Reception of Air Interface Data
      5. 6.12.5 Data Transmission to MCU
      6. 6.12.6 Serial Interface Communication (SPI)
        1. 6.12.6.1 Serial Interface Mode Without Slave Select (SS)
        2. 6.12.6.2 Serial Interface Mode With Slave Select (SS)
      7. 6.12.7 Direct Mode
    13. 6.13 Direct Commands from MCU to Reader
      1. 6.13.1 Command Codes
      2. 6.13.2 Reset FIFO (0x0F)
      3. 6.13.3 Transmission With CRC (0x11)
      4. 6.13.4 Transmission Without CRC (0x10)
      5. 6.13.5 Block Receiver (0x16)
      6. 6.13.6 Enable Receiver (0x17)
      7. 6.13.7 Test Internal RF (RSSI at RX Input With TX On) (0x18)
      8. 6.13.8 Test External RF (RSSI at RX Input With TX Off) (0x19)
      9. 6.13.9 Register Preset
    14. 6.14 Register Description
      1. 6.14.1 Register Overview
        1. 6.14.1.1 Main Configuration Registers
          1. 6.14.1.1.1 Chip Status Control Register (0x00)
          2. 6.14.1.1.2 ISO Control Register (0x01)
        2. 6.14.1.2 Protocol Subsetting Registers
          1. 6.14.1.2.1 ISO14443B TX Options Register (0x02)
          2. 6.14.1.2.2 ISO14443A High-Bit-Rate and Parity Options Register (0x03)
          3. 6.14.1.2.3 TX Pulse Length Control Register (0x06)
          4. 6.14.1.2.4 RX No Response Wait Time Register (0x07)
          5. 6.14.1.2.5 RX Wait Time Register (0x08)
          6. 6.14.1.2.6 Modulator and SYS_CLK Control Register (0x09)
          7. 6.14.1.2.7 RX Special Setting Register (0x0A)
          8. 6.14.1.2.8 Regulator and I/O Control Register (0x0B)
        3. 6.14.1.3 Status Registers
          1. 6.14.1.3.1 IRQ Status Register (0x0C)
          2. 6.14.1.3.2 Collision Position and Interrupt Mask Registers (0x0D and 0x0E)
          3. 6.14.1.3.3 RSSI Levels and Oscillator Status Register (0x0F)
        4. 6.14.1.4 Test Registers
          1. 6.14.1.4.1 Test Register (0x1A)
          2. 6.14.1.4.2 Test Register (0x1B)
        5. 6.14.1.5 FIFO Control Registers
          1. 6.14.1.5.1 FIFO Status Register (0x1C)
          2. 6.14.1.5.2 TX Length Byte1 Register (0x1D) and TX Length Byte2 Register (0x1E)
  7. 7Applications, Implementation, and Layout
    1. 7.1 TRF7963A Reader System Using SPI With SS Mode
      1. 7.1.1 General Application Considerations
      2. 7.1.2 Schematic
    2. 7.2 System Design
      1. 7.2.1 Layout Considerations
      2. 7.2.2 Impedance Matching TX_Out (Pin 5) to 50 Ω
      3. 7.2.3 Reader Antenna Design Guidelines
  8. 8器件和文档支持
    1. 8.1 入门和后续步骤
    2. 8.2 器件命名规则
    3. 8.3 工具和软件
    4. 8.4 文档支持
    5. 8.5 社区资源
    6. 8.6 商标
    7. 8.7 静电放电警告
    8. 8.8 出口管制提示
    9. 8.9 Glossary
  9. 9机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

2 修订历史记录

Changes from January 7, 2015 to May 17, 2017

  • 更新了 应用列表Go
  • 更新了Section 1.3“说明”的内容Go
  • 将Figure 1-1“应用框图”移到Section 1.4，并删除了功能框图（请参阅Section 6.1中的框图）Go
  • Added Section 3, Device Characteristics, and moved Table 3-1 to itGo
  • Added Section 3.1, Related ProductsGo
  • Changed the TYP value of the fD_CLKmax parameter from 8 MHz to 4 MHz in Section 5.4, Electrical CharacteristicsGo
  • Removed the sentence " This mechanism must be used to avoid reading holes" in the paragraph that starts "The default MUX setting is RX_IN1 connected..." in Section 6.6.1, Main and Auxiliary ReceiverGo
  • Removed paragraphs starting with "The main receiver also has a second receiver gain..." and "By default, the AGC is frozen..." in Section 6.6.2, Receiver Gain and Filter StagesGo
  • Changed B1 and B0 to Reserved in Table 6-4, RX Special Setting Register (0x0A)Go
  • Updated the first four paragraphs of Section 6.7, Receiver - Digital SectionGo
  • Updated the first three steps in the procedure that follows "To check the internal or external RSSI value..." in Section 6.7.1.2, External RSSIGo
  • Changed the title of Table 6-5 from Minimum Crystal Requirements to Minimum Crystal Recommendations and removed the ESR rowGo
  • Updated the list that follows "There are two ways to start the transmit operation" in Section 6.10, Transmitter - Digital SectionGo
  • Updated the description in Section 6.11, Transmitter – External Power Amplifier or Subcarrier DetectorGo
  • Updated the paragraph that starts "If the received packet is longer than 8 bytes..." in Section 6.12.4, Reception of Air Interface DataGo
  • Corrected Reset FIFO command name in the title of Section 6.13.2, Reset FIFO (0x0F)Go
  • Removed former Section 6.13.12, Receiver Gain Adjust (0x1A)Go
  • Moved Section 6.14, Register DescriptionGo
  • Removed "AGC" from the description of the register in Section 6.14.1.1.1, Chip Status Control Register (0x00)Go
  • Changed B2 to Reserved in Table 6-16, Chip Status Control Register (0x00)Go
  • Changed B1 and B0 to Reserved in Table 6-25, RX Special Setting Register (0x0A)Go
  • Removed the description of AGC in Section 6.14.1.2.7, RX Special Setting Register (0x0A)Go
  • Changed "High nibble" to "Middle nibble" in description of B3:B0 in Table 6-38, TX Length Byte1 Register (0x1D)Go
  • Changed "High nibble" to "Low nibble" in description of B7:B4 in Table 6-39, TX Length Byte2 Register (0x1E)Go
  • Moved and changed title of Section 7, Applications, Implementation, and LayoutGo
  • Deleted former section Reader System Using Parallel Microcontroller Interface in Section 7, Applications, Implementation, and LayoutGo
  • Updated Figure 7-1, Application Schematic, SPI With SS Mode MCU InterfaceGo
  • Updated the paragraph that starts "Minimum MCU requirements depend on application requirements..." in Section 7.1.2, SchematicGo
  • Moved Section 7.2, System DesignGo
  • 添加了Section 8.1“入门和后续步骤”Go
  • 添加了Section 8.2“器件命名规则”Go
  • 添加了Section 8.3“工具和软件”Go
  • 更新了Section 8.4“文档支持”Go