SLVSLH1A April 2026 – October 2026 TPS7E72
PRODUCTION DATA
For best overall performance, follow the guidelines in this section. Place all circuit components on the same side of the printed circuit board (PCB) and as near as practical to the respective LDO pin connections. Place ground return connections for the input and output capacitors as close to the GND pin as possible, using wide, component-side, copper planes or traces. Avoid using vias and long traces to create LDO circuit connections to the input capacitor, output capacitor, or resistor divider, as parasitic inductance in these connections negatively affects system performance. This grounding and layout scheme minimizes inductive parasitics and thereby reduces output voltage transients due to load current changes, minimizes noise, and increases circuit stability.
Use of a solid ground plane is recommended for best performance. This plane should be placed on the layer immediately beneath the component-side routing, or on the solder-side (bottom) layer in a two-layer PCB. A solid ground plane helps minimize parasitic inductance between the LDO and load, improving transient response, and helps to minimize noise pickup from external sources.
To improve the thermal performance of the device, and to maximize the current output at high ambient temperature, spread the copper under the thermal pad as far as possible and place thermal vias on the copper under the thermal pad to help conduct heat to copper on the opposite side of the PCB. If assembly requirements permit, a solid connection without thermal relief should be made between the thermal pad and connected copper. Figure 7-11 and Figure 7-12 show example layout for TPS7E72 packages.