ZHCSBA4E May   2013  – August 2014 TPS7A8300

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用范围
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Pin Configurations and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 ANY-OUT Programmable Output Voltage
      2. 7.3.2 Adjustable Operation
      3. 7.3.3 ANY-OUT Operation
      4. 7.3.4 2-A LDO with an Internal Charge Pump
        1. 7.3.4.1 Dropout Voltage (VDO)
        2. 7.3.4.2 Output Voltage Accuracy
        3. 7.3.4.3 Internal Charge Pump
      5. 7.3.5 Low-Noise, 0.8-V Reference
      6. 7.3.6 Internal Protection Circuitry
        1. 7.3.6.1 Undervoltage Lockout (UVLO)
        2. 7.3.6.2 Internal Current Limit (I(LIM))
        3. 7.3.6.3 Thermal Protection
      7. 7.3.7 Programmable Soft-Start
      8. 7.3.8 Power-Good Function
      9. 7.3.9 Integrated Resistance Network (ANY-OUT)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation with 1.1 V > VIN > 1.4 V
      2. 7.4.2 Operation with 1.4 V ≥ VIN > 6.5 V
      3. 7.4.3 Disabled
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Start-Up
        1. 8.1.1.1 Enable (EN) and Undervoltage Lockout (UVLO)
        2. 8.1.1.2 Noise-Reduction and Soft-Start Capacitor (CNR/SS)
        3. 8.1.1.3 Soft-Start and Inrush Current
      2. 8.1.2 Capacitor Recommendation
        1. 8.1.2.1 Input and Output Capacitor Requirements (CIN and COUT)
        2. 8.1.2.2 Feed-Forward Capacitor (CFF)
      3. 8.1.3 AC Performance
        1. 8.1.3.1 Power-Supply Ripple Rejection (PSRR)
        2. 8.1.3.2 Load-Step Transient Response
        3. 8.1.3.3 Noise
        4. 8.1.3.4 Behavior when Transitioning from Steady Dropout into Regulation
      4. 8.1.4 Power Dissipation (PD)
      5. 8.1.5 Estimating Junction Temperature
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don'ts
  9. 9 Power-Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Board Layout
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 器件支持
      1. 11.1.1 开发支持
        1. 11.1.1.1 评估模块
        2. 11.1.1.2 Spice 模型
      2. 11.1.2 器件命名规则
    2. 11.2 文档支持
      1. 11.2.1 相关文档　
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 术语表
  12. 12机械封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

10 Layout

10.1 Layout Guidelines

10.1.1 Board Layout

For best overall performance, place all circuit components on the same side of the circuit board and as near as practical to the respective LDO pin connections. Place ground return connections to the input and output capacitor, and to the LDO ground pin as close to each other as possible, connected by a wide, component-side, copper surface. The use of vias and long traces to create LDO circuit connections is strongly discouraged and negatively affects system performance. This grounding and layout scheme minimizes inductive parasitics, and thereby reduces load-current transients, minimizes noise, and increases circuit stability.

A ground reference plane is also recommended and is either embedded in the PCB itself or located on the bottom side of the PCB opposite the components. This reference plane serves to assure accuracy of the output voltage, shield noise, and behaves similar to a thermal plane to spread (or sink) heat from the LDO device when connected to the PowerPAD™. In most applications, this ground plane is necessary to meet thermal requirements.

10.2 Layout Example

RecLayout.gifFigure 57. Example Layout