SLVSAJ4D September   2010  – March 2026 TPS723-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Power Dissipation Ratings (legacy chip)
    5. 5.5 Thermal Information (new chip)
    6. 5.6 Electrical Characteristics
  7. 6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable
      2. 7.3.2 Current Limit
      3. 7.3.3 Dropout Voltage
      4. 7.3.4 Output Pullup
      5. 7.3.5 Thermal Shutdown
      6. 7.3.6 Undervoltage Lockout (UVLO)
      7. 7.3.7 NR and Programmable Soft-Start
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device Functional Mode Comparison
      2. 7.4.2 Normal Operation
      3. 7.4.3 Dropout Operation
      4. 7.4.4 Disabled
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Adjustable Device Feedback Resistor Selection
      2. 8.1.2 Recommended Capacitor Types
      3. 8.1.3 Input and Output Capacitor Selection
      4. 8.1.4 Reverse Current
      5. 8.1.5 Feed-Forward Capacitor (CFF)
      6. 8.1.6 Power Dissipation (PD)
      7. 8.1.7 Estimating Junction Temperature
    2. 8.2 Typical Application
      1. 8.2.1 Output Noise
      2. 8.2.2 Design Requirements
      3. 8.2.3 Power-Supply Rejection
      4. 8.2.4 Application Curves
    3. 8.3 Best Design Practices
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 Spice Models
      2. 9.1.2 Device Nomenclature
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

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7.3.6 Undervoltage Lockout (UVLO)

The new chip has an independent undervoltage lockout (UVLO) circuit that monitors the input voltage, allowing a controlled and consistent turn on and off of the output voltage. To prevent the device from turning off if the input drops during turn on, the UVLO has hysteresis as specified in the Section 5.6 table.