ZHCSDX6 July   2015 TPS65400-Q1

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
  4. 修订历史记录
  5. 说明(续)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 System Characteristics
    7. 7.7 Operational Parameters
    8. 7.8 Package Dissipation Ratings
    9. 7.9 Typical Characteristics: System Efficiency
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1  Startup Timing and Power Sequencing
        1. 8.3.1.1 Startup Timing
        2. 8.3.1.2 External Sequencing
        3. 8.3.1.3 Internal Sequencing
      2. 8.3.2  UVLO and Precision Enables
      3. 8.3.3  Soft-Start and Prebiased Startup
        1. 8.3.3.1 Analog Soft-Start (Default) and Digital Soft-Start
        2. 8.3.3.2 Soft-Start Capacitor Selection
      4. 8.3.4  PWM Switching Frequency Selection
      5. 8.3.5  Clock Synchronization
      6. 8.3.6  Phase Interleaving
      7. 8.3.7  Fault Handling
      8. 8.3.8  OCP for SW1 to SW4
      9. 8.3.9  Overcurrent Protection for SW1 to SW4 in Current Sharing Operation
      10. 8.3.10 Recovery on Power Loss
      11. 8.3.11 Feedback Compensation
      12. 8.3.12 Adjusting Output Voltage
      13. 8.3.13 Digital Interface - PMBus
      14. 8.3.14 Initial Configuration
    4. 8.4 Device Functional Modes
      1. 8.4.1 CCM Operation Mode
      2. 8.4.2 CCM/DCM Operation Mode
      3. 8.4.3 Current Sharing Mode
    5. 8.5 Register Maps
      1. 8.5.1 PMBus
        1. 8.5.1.1 Overview
        2. 8.5.1.2 PMBus Protocol
          1. 8.5.1.2.1  PMBus Protocol
          2. 8.5.1.2.2  Transactions (No PEC)
          3. 8.5.1.2.3  Addressing
          4. 8.5.1.2.4  Startup
          5. 8.5.1.2.5  Bus Speed
          6. 8.5.1.2.6  I2CALERT Terminal
          7. 8.5.1.2.7  CONTROL Terminal
          8. 8.5.1.2.8  Packet Error Checking
          9. 8.5.1.2.9  Group Commands
          10. 8.5.1.2.10 Unsupported Features
      2. 8.5.2 PMBus Register Descriptions
        1. 8.5.2.1 Overview
        2. 8.5.2.2 Memory Model
        3. 8.5.2.3 Data Formats
        4. 8.5.2.4 Fault Monitoring
      3. 8.5.3 PMBus Core Commands
        1. 8.5.3.1  (00h) PAGE
        2. 8.5.3.2  (01h) OPERATION
        3. 8.5.3.3  (03h) CLEAR_FAULTS
        4. 8.5.3.4  (10h) WRITE_PROTECT
        5. 8.5.3.5  (11h) STORE_DEFAULT_ALL
        6. 8.5.3.6  (19h) CAPABILITY
        7. 8.5.3.7  (78h) STATUS_BYTE
        8. 8.5.3.8  (79h) STATUS_WORD
        9. 8.5.3.9  (7Ah) STATUS_VOUT
        10. 8.5.3.10 (80h) STATUS_MFR_SPECIFIC
        11. 8.5.3.11 (98h) PMBUS_REVISION
        12. 8.5.3.12 (ADh) IC_DEVICE_ID
        13. 8.5.3.13 (AEh) IC_DEVICE_REV
      4. 8.5.4 Manufacturer-Specific Commands
        1. 8.5.4.1  (D0h) USER_DATA_BYTE_00
        2. 8.5.4.2  (D1h) USER_DATA_BYTE_01
        3. 8.5.4.3  (D2h) PIN_CONFIG_00
        4. 8.5.4.4  (D3h) PIN_CONFIG_01
        5. 8.5.4.5  (D4h) SEQUENCE_CONFIG
        6. 8.5.4.6  (D5h) SEQUENCE_ORDER
        7. 8.5.4.7  (D6h) IOUT_MODE
        8. 8.5.4.8  (D7h) FREQUENCY_PHASE
        9. 8.5.4.9  (D8h) VREF_COMMAND
        10. 8.5.4.10 (D9h) IOUT_MAX
        11. 8.5.4.11 (DAh) USER_RAM_00
        12. 8.5.4.12 (DBh) SOFT_RESET
        13. 8.5.4.13 (DCh) RESET_DELAY
        14. 8.5.4.14 (DDh) TON_TOFF_DELAY
        15. 8.5.4.15 (DEh) TON_TRANSITION_RATE
        16. 8.5.4.16 (DFh) VREF_TRANSITION_RATE
        17. 8.5.4.17 (F0h) SLOPE_COMPENSATION
        18. 8.5.4.18 (F1h) ISENSE_GAIN
        19. 8.5.4.19 (FCh) DEVICE_CODE
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Internal Operation Typical Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Component Selection
            1. 9.2.1.2.1.1 Output Inductor Selection
            2. 9.2.1.2.1.2 Output Capacitor Selection
          2. 9.2.1.2.2 Internal Operation With Some Switchers Disabled
          3. 9.2.1.2.3 Internal Operation With All Switchers Enabled
          4. 9.2.1.2.4 Example Configuration
          5. 9.2.1.2.5 Unused Switchers
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Current Sharing Typical Application
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1 Current Sharing Timing Example
      3. 9.2.3 External Sequencing Application
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
          1. 9.2.3.2.1 External Sequencing Through PG Pins
          2. 9.2.3.2.2 External Sequencing Through SW
          3. 9.2.3.2.3 Example Configuration
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 文档支持
      1. 12.1.1 相关文档
      2. 12.1.2 相关器件
    2. 12.2 社区资源
    3. 12.3 商标
    4. 12.4 静电放电警告
    5. 12.5 Glossary
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

12 器件和文档支持

12.1 文档支持

12.1.1 相关文档

  • 《PMBus 电源系统管理协议规范第 I 部分 – 一般要求、传输和电气接口》,版本 1.2,2010 年 9 月 6 日,电源管理总线应用者论坛出版 (http://pmbus.org/Specifications)。

12.1.2 相关器件

器件型号 说明 备注
TPS65262 4.5V 至 18V 三路降压,具有双路可调 LDO 三路降压 3A/1A/1A 输出电流,双路 LDO 100mA/200mA 输出电流,自动电源排序
TPS65263 4.5V 至 18V 三路降压,具有 I2C 接口 三路降压 3A/2A/2A 输出电流,I2C 控制的动态电压调节 (DVS)
TPS65651-1/2/3 4.5V 至 18V 三路降压,具有多种 PGOOD 去毛刺脉冲时间 三路降压 3A/2A/2A 输出电流,支持 1s、32ms 和 256ms 三种 PGOOD 去毛刺脉冲时间,可通过外部电阻调节限流设置
TPS65287 4.5V 至 18V 三路降压,具有电源开关和按钮控制 三路降压 3A/2A/2A 输出电流,最高 2.1A USB 电源,可通过外部电阻进行过流设置,可通过按钮控制智能系统上电/掉电操作
TPS65288 4.5V 至 18V 三路降压,具有双电源开关 三路降压 3A/2A/2A 输出电流,2 个 USB 电源开关,限流典型值为 1.2A(出厂时提供 0.8/1/1.4/1.6/1.8/2/2.2A 多种电流供选择调整)

12.2 社区资源

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

    TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers.
    Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.

12.3 商标

E2E is a trademark of Texas Instruments.

All other trademarks are the property of their respective owners.

12.4 静电放电警告

esds-image

这些装置包含有限的内置 ESD 保护。 存储或装卸时,应将导线一起截短或将装置放置于导电泡棉中,以防止 MOS 门极遭受静电损伤。

12.5 Glossary

SLYZ022TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.