ZHCSQM7A may   2022  – march 2023 TPS65219

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  System Control Thresholds
    6. 6.6  BUCK1 Converter
    7. 6.7  BUCK2, BUCK3 Converter
    8. 6.8  General Purpose LDOs (LDO1, LDO2)
    9. 6.9  General Purpose LDOs (LDO3, LDO4)
    10. 6.10 GPIOs and multi-function pins (EN/PB/VSENSE, nRSTOUT, nINT, GPO1, GPO2, GPIO, MODE/RESET, MODE/STBY, VSEL_SD/VSEL_DDR)
    11. 6.11 Voltage and Temperature Monitors
    12. 6.12 I2C Interface
    13. 6.13 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Power-Up Sequencing
      2. 7.3.2  Power-Down Sequencing
      3. 7.3.3  Push Button and Enable Input (EN/PB/VSENSE)
      4. 7.3.4  Reset to SoC (nRSTOUT)
      5. 7.3.5  Buck Converters (Buck1, Buck2, and Buck3)
      6. 7.3.6  Linear Regulators (LDO1 through LDO4)
      7. 7.3.7  Interrupt Pin (nINT)
      8. 7.3.8  PWM/PFM and Low Power Modes (MODE/STBY)
      9. 7.3.9  PWM/PFM and Reset (MODE/RESET)
      10. 7.3.10 Voltage Select pin (VSEL_SD/VSEL_DDR)
      11. 7.3.11 General Purpose Inputs or Outputs (GPO1, GPO2, and GPIO)
      12. 7.3.12 I2C-Compatible Interface
        1. 7.3.12.1 Data Validity
        2. 7.3.12.2 Start and Stop Conditions
        3. 7.3.12.3 Transferring Data
    4. 7.4 Device Functional Modes
      1. 7.4.1 Modes of Operation
        1. 7.4.1.1 OFF State
        2. 7.4.1.2 INITIALIZE State
        3. 7.4.1.3 ACTIVE State
        4. 7.4.1.4 STBY State
        5. 7.4.1.5 Fault Handling
    5. 7.5 User Registers
    6. 7.6 Device Registers
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Typical Application Example
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
        1. 8.2.3.1 Buck1, Buck2, Buck3 Design Procedure
        2. 8.2.3.2 LDO1, LDO2 Design Procedure
        3. 8.2.3.3 LDO3, LDO4 Design Procedure
        4. 8.2.3.4 VSYS, VDD1P8
        5. 8.2.3.5 Digital Signals Design Procedure
    3. 8.3 Application Curves
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 接收文档更新通知
    2. 9.2 支持资源
    3. 9.3 Trademarks
    4. 9.4 静电放电警告
    5. 9.5 术语表
  10. 10Mechanical, Packaging, and Orderable Information

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • RSM|32
  • RHB|32
散热焊盘机械数据 (封装 | 引脚)

6.6 BUCK1 Converter

over operating free-air temperature range (unless otherwise noted)
POS PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Electrical Characteristics
5.1.1a VIN_BUCK1 Input voltage(1) Buck supply voltage, maximum VSYS 2.5 5.5 V
5.1.1b VOUT_BUCK1 Buck Output Voltage configurable Range Output voltage configurable in 25mV-steps for 0.6V ≤ VOUT ≤ 1.4V, in 100mV steps for 1.4V < VOUT ≤ 3.4V 0.6 3.4 V
5.1.2a IQ_BUCK1 Quiescent Current at 25°C, PFM, low BW case PFM, BUCK1 enabled, no load,
VIN = 5.0V, VOUT = 1.2V, TJ=25°C		 10 13 μA
5.1.2b IQ_BUCK1 Quiescent Current -40°C to 125°C, PFM, low BW case PFM, BUCK1 enabled, no load,
VIN = 5.0V, VOUT = 1.2V, TJ=-40°C to 125°C		 15 44 μA
5.1.2c IQ_BUCK1
Quiescent Current -40°C to 150°C, PFM, low BW case
 		 PFM, BUCK1 enabled, no load,
VIN = 5.0V, VOUT = 1.2V, TJ=-40°C to 150°C		 20 63 μA
5.1.3a VHEADROOM_PWM Input to Output Voltage Headroom(2) Corner cases at maximum load IOUT = 2.5A
 500 mV
5.1.3b VHEADROOM_PWM Input to Output Voltage Headroom at IOUT = IOUT_MAX(2) Corner cases at IOUT = IOUT_MAX
 700 mV
5.1.3c VHEADROOM_FF Input to Output Voltage Headroom(2) Corner cases at maximum load IOUT = 0.7A
 500 mV
5.1.3d VHEADROOM_FF Input to Output Voltage Headroom at IOUT = IOUT_MAX(2) Corner cases at IOUT = IOUT_MAX
 1000 mV
5.1.4 VOUT_STEP_LOW Output voltage Steps 0.6V ≤ VOUT ≤ 1.4V 25 mV
5.1.5 VOUT_STEP_HIGH Output voltage Steps 1.5V ≤ VOUT ≤ 3.4V 100 mV
5.1.6a VOUT_ACC_DC_PWM DC Output Voltage Accuracy in forced PWM mode, low and high BW case IOUT = IOUT_MAX,
VOUT ≥ 0.7V to 3.4V,
VIN - VOUT > 700 mV
forced PWM, low BW case		 –1.5% 1.5%
5.1.6b VOUT_ACC_DC_PWM DC Output Voltage Accuracy in forced PWM mode, low and high BW case IOUT = IOUT_MAX,
VOUT = 0.6V to 0.7V,
VIN - VOUT > 700 mV
forced PWM, low BW case		 –10 10 mV
5.1.6c VOUT_ACC_DC_PFM DC Output Voltage Accuracy in auto-PFM mode, low and high BW case IOUT = 1mA,
VOUT = 0.6V to 3.4V,
VIN - VOUT > 500 mV
auto-PFM, low BW case		 –3.0% 3.5%
5.1.7 RFB_INPUT Feedback input impedance Converter enabled 2.3 3.75 5.0 MΩ
5.2.1a VLOAD_REG_PWM DC Load Regulation, forced PWM, low BW case VIN = 5.0V, VOUT = 1.2V,
IOUT = 0 to IOUT_MAX,
forced PWM, low BW case, COUT = 40μF		 0.1 0.16 %/A
5.2.1b VLOAD_REG_FF DC Load Regulation, fixed frequency, low BW case VIN = 5.0V, VOUT = 1.2V,
IOUT = 0 to IOUT_MAX,
fixed frequency, low BW case, COUT = 40μF		 0.1 0.16 %/A
5.2.2a VLINE_REG DC Line Regulation, forced PWM, low BW case VIN = 3.3V to 5.5V,
VOUT = 1.2V,
IOUT = 1mA and IOUT_MAX
forced PWM, low BW case, COUT = 40μF		 0.1 0.16 %/V
5.2.2b VLINE_REG DC Line Regulation, fixed frequency, low BW case VIN = 3.3V to 5.5V,
VOUT = 1.2V,
IOUT = 1mA and IOUT_MAX
fixed frequency, low BW case, COUT = 12μF		 0.1 0.16 %/V
5.2.3a VLOAD_TRANSIENT Load Transient, VOUT=0.75V, auto-PFM, high BW case VIN = 5.0V, VOUT = 0.75V,
IOUT = 100mA to 1100mA to 100mA,
tR = tF = 500ns,
auto-PFM, high BW case, COUT = 80μF		 –27.5 27.5 mV
5.2.3b VLOAD_TRANSIENT Load Transient, VOUT=0.75V, forced PWM, high BW case VIN = 5.0V, VOUT = 0.75V,
IOUT = 100mA to 1100mA to 100mA,
tR = tF = 500ns,
forced PWM, high BW case, COUT = 80 μF		 –27.5 27.5 mV
5.2.3c VLOAD_TRANSIENT Load Transient, VOUT=0.75V, fixed frequency, high BW case VIN = 5.0V, VOUT = 0.75V,
IOUT = IOUT = 100mA to 1100mA to 100mA,
tR = tF = 500ns,
fixed frequency, high BW case, COUT = 60 μF		 –27.5 27.5 mV
5.2.4a VLOAD_TRANSIENT Load Transient, VOUT=1.8V, auto-PFM, low BW case VIN = 5.0V, VOUT = 1.8V,
IOUT = 1mA to 1A to 1mA,
tR = tF = 1μs,
auto-PFM, COUT = 40μF		 -90 90 mV
5.2.4b VLOAD_TRANSIENT Load Transient, VOUT=1.8V, forced PWM, low BW case VIN = 5.0V, VOUT = 1.8V,
IOUT = 1mA to 1A to 1mA,
tR = tF = 1μs,
forced PWM, COUT = 40μF		 -60 60 mV
5.2.4c VLOAD_TRANSIENT Load Transient, VOUT=1.8V, fixed frequency, low BW case VIN = 5.0V, VOUT = 1.8V,
IOUT = 1mA to 1A to 1mA,
tR = tF = 1μs,
fixed frequency, low BW case, COUT = 12μF		 -180 180 mV
5.2.5a VLINE_TRANSIENT Line Transient, VOUT=1.2V, forced PWM, low BW case VIN = 3.3V to 5.5V in 50μs,
VOUT = 1.2V, IOUT = 1mA and IOUT_MAX,
forced PWM, low BW case, COUT = 40μF		 –50 50 mV
5.2.5b VLINE_TRANSIENT Line Transient, VOUT=1.2V, fixed frequency, low BW case VIN = 3.3V to 5.5V in 50μs,
VOUT = 1.2V, IOUT = 1mA and IOUT_MAX,
fixed frequency, low BW case, COUT = 12μF		 –50 50 mV
5.2.6a VRIPPLE_PP_PWM Forced PWM Mode, low BW case VIN = 5.0V, VOUT = 2.5V,
forced PWM, low BW case, COUT = 40uF, X5R, ESR = 10mOhm,
L = 470nH, DCR = 50mΩ
IOUT = 1A		 10 20 mVPP
5.2.6b VRIPPLE_PP_PFM Auto PFM Mode, low BW case VIN = 5.0V, VOUT = 2.5V,
auto PFM, low BW case, COUT = 40uF, X5R, ESR = 10mOhm,
L = 470nH, DCR = 50mΩ
IOUT = 20mA		 20 40 mVPP
5.2.6c VRIPPLE_PP_FF Fixed Frequency Mode, low BW case, spread spectrum disabled VIN = 5.0V, VOUT = 2.5V,
fixed frequency, low BW case, COUT = 12uF, X5R, ESR = 10mOhm,
L = 470nH, DCR = 50mΩ,
IOUT = 1A,
Spread-Spectrum disabled		 10 20 mVPP
5.2.6d VRIPPLE_PP_FF_SS Fixed Frequency Mode, low BW case VIN = 5.0V, VOUT = 2.5V,
fixed frequency, low BW case, COUT = 12uF, X5R, ESR = 10mOhm,
L = 470nH, DCR = 50mΩ,
IOUT = 1A,
Spread-Spectrum enabled		 20 40 mVPP
5.3.1 IOUT_MAX Maximum Operating Current 3.5 A
5.3.2 ICURRENT_LIMIT Peak Current Limit VIN = 2.5V to 5.5V  4.6 5.7 6.9 A
5.3.3 IREV_CUR_LIMIT Reverse Peak Current Limit VIN = 2.5V to 5.5V  –2.0 –1.5 –1.0 A
5.3.4a RDSON_HS High Side MOSFET On Resistance, 5V-supply Measured Pin to Pin, VIN = 5V 70 mΩ
5.3.4b RDSON_HS High Side MOSFET On Resistance, 3.3V-supply Measured Pin to Pin, VIN = 3.3V 80 mΩ
5.3.5a RDSON_LS Low Side MOSFET On Resistance, 5V-supply Measured Pin to Pin, VIN = 5V 40 mΩ
5.3.5b RDSON_LS Low Side MOSFET On Resistance, 3.3V-supply Measured Pin to Pin, VIN = 3.3V 50 mΩ
5.3.6 RDISCHARGE Output Discharge Resistance Active only when converter is disabled 60 125 200 Ω
5.4.1 LSW Output Inductance DCR = 50mΩ max 330 470 611 nH
5.4.2a COUT Output Capacitance in auto-PFM or forced PWM for low BW case ESR = 10mΩ max 10 75 μF
5.4.3a COUT_HIGH_BW Output Capacitance in auto-PFM or forced PWM for high BW case ESR = 10mΩ max 30 220 μF
Timing Requirements
5.5.1 tRAMP Ramp Time in forced PWM, low BW case Time from enable to 98% of target value, assuming no residual voltage 0.3 1.65 ms
5.5.2a DVFS_RISE_
QFF		 DVFS timing requirements in forced PWM, rising slope Step-duration during DVFS voltage adjustments from 0.6V to 1.4V 2.9 3.2 3.5 mV/μs
5.5.2b DVFS_RISE_
FF		 DVFS timing requirements in fixed-frequency mode, rising slope Step-duration during DVFS voltage adjustments from 0.6V to 1.4V 1.8 2.1 2.5 mV/μs
5.5.2c DVFS_FALL DVFS timing requirements in forced PWM or fixed-frequency mode, falling slope Step-duration during DVFS voltage adjustments from 1.4V to 0.6V 0.45 0.53 0.61 mV/μs
Switching Characteristics
5.6.1a fSW Switching Frequency, forced PWM, high or low BW case Forced PWM, VIN = 3.3V to 5V,
VOUT = 0.8V to 1.8V,
IOUT = 1A to 3A 
 2.3 MHz
(1) PVIN_Bx must not exceed VSYS
(2) Refers to DC-regulation only. Transient response my require more headroom. With low headroom, the frequency variation increases for quasi-fixed frequency.