ZHCSN71D December   2021  – April 2024 TPS62A01 , TPS62A01A , TPS62A02 , TPS62A02A

PRODMIX  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Save Mode
      2. 7.3.2 100% Duty Cycle Low Dropout Operation
      3. 7.3.3 Soft Start
      4. 7.3.4 Switch Current Limit and Short-Circuit Protection (HICCUP)
      5. 7.3.5 Undervoltage Lockout
      6. 7.3.6 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable and Disable
      2. 7.4.2 Power Good
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Setting the Output Voltage
        2. 8.2.2.2 Output Filter Design
        3. 8.2.2.3 Input and Output Capacitor Selection
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 第三方产品免责声明
    2. 9.2 接收文档更新通知
    3. 9.3 支持资源
    4. 9.4 Trademarks
    5. 9.5 静电放电警告
    6. 9.6 术语表
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

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5 Pin Configuration and Functions

GUID-20231121-SS0I-DPGX-707J-GZV7QKZ0WXV6-low.svg Figure 5-1 6-Pin DRL SOT-563 Package (Top View), 6-Pin DDC SOT-23 package (Top VIew)
Table 5-1 Pin Functions
Pin Number Type(1) Description
Name SOT563-6 SOT23-6
EN 4 1 I Device enable logic input. Logic high enables the device. Logic low disables the device and turns the device into shutdown. Do not leave the pin floating.
FB 5 6 I Feedback pin for the internal control loop. Connect this pin to an external feedback divider.
GND 1 2 G Ground pin.
PG 6 5 O Power-good open-drain output pin. The pullup resistor cannot be connected to any voltage higher than 5.5V. If unused, leave the pin open or connect to GND.
OUT(2) / I Output voltage sense pin.
SW 2 3 O Switch pin connected to the internal FET switches and inductor terminal. Connect the inductor of the output filter to this pin.
VIN 3 4 I Input voltage pin. Connect the input capacitor as close as possible between VIN and GND.
(1) I = Input, O = Output, G = Ground.
(2) Only for TPS62A0xN versions.