ZHCSIV9F September 2009 – October 2018 TPS386000 , TPS386040
PRODUCTION DATA.
The manual reset (MR) input allows external logic signal from other processors, logic circuits, and/or discrete sensors to initiate a device reset. Because MR is connected to SVS-1, the RESET1 or RESET1 pin is intended to be connected to processor(s) as a primary reset source. A logic low at MR causes RESET1 or RESET1 to assert. After MR returns to a logic high and SENSE1 is above its reset threshold, RESET1 or RESET1 is released after the user-configured reset delay time. Unlike the TPS3808 series, the TPS3860x0 does not integrate an internal pullup resistor between MR and VDD.
To control the MR function from more than one logic signal, the logic signals can be combined by wired-OR into the MR pin using multiple NMOS transistors and one pullup resistor.