ZHCSFP2B October   2016  – September 2021 TPS3850

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Timing Diagrams
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 CRST
      2. 7.3.2 RESET
      3. 7.3.3 Over- and Undervoltage Fault Detection
      4. 7.3.4 Adjustable Operation Using the TPS3850H01
      5. 7.3.5 Window Watchdog
        1. 7.3.5.1 SET0 and SET1
          1. 7.3.5.1.1 Enabling the Window Watchdog
          2. 7.3.5.1.2 Disabling the Watchdog Timer When Using the CRST Capacitor
          3. 7.3.5.1.3 SET0 and SET1 During Normal Watchdog Operation
      6. 7.3.6 Window Watchdog Timer
        1. 7.3.6.1 CWD
        2. 7.3.6.2 WDI Functionality
        3. 7.3.6.3 WDO Functionality
    4. 7.4 Device Functional Modes
      1. 7.4.1 VDD is Below VPOR ( VDD < VPOR)
      2. 7.4.2 Above Power-On-Reset But Less Than UVLO (VPOR ≤ VDD < VUVLO)
      3. 7.4.3 Above UVLO But Less Than VDD (min) (VUVLO ≤ VDD < VDD (min))
      4. 7.4.4 Normal Operation (VDD ≥ VDD (min))
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 CRST Delay
        1. 8.1.1.1 Factory-Programmed Reset Delay Timing
        2. 8.1.1.2 Programmable Reset Delay-Timing
      2. 8.1.2 CWD Functionality
        1. 8.1.2.1 Factory-Programmed Timing Options
        2. 8.1.2.2 Adjustable Capacitor Timing
      3. 8.1.3 Adjustable SENSE Configuration
      4. 8.1.4 Overdrive on the SENSE Pin
    2. 8.2 Typical Applications
      1. 8.2.1 Design 1: Monitoring a 1.2-V Rail with Factory-Programmable Watchdog Timing
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Monitoring the 1.2-V Rail
          2. 8.2.1.2.2 Meeting the Minimum Reset Delay
          3. 8.2.1.2.3 Setting the Watchdog Window
          4. 8.2.1.2.4 Calculating the RESET and WDO Pullup Resistor
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Design 2: Using TPS3850H01 to monitor a 0.7-V Rail With an Adjustable Window Watchdog Timing
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Meeting the Minimum Reset Delay
          2. 8.2.2.2.2 Setting the Window Watchdog
          3. 8.2.2.2.3 Watchdog Disabled During the Initialization Period
          4. 8.2.2.2.4 Calculating the Sense Resistor
        3. 8.2.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 接收文档更新通知
    4. 11.4 支持资源
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 术语表
  12. 12Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

3 说明

TPS3850 将精密监控器与一个可编程窗口看门狗定时器相结合。TPS3850 窗口比较器在 SENSE 引脚上可针对过压 (VIT+(OV)) 和欠压 (VIT–(UV)) 阈值实现 0.8% 的精度（–40°C 至 +125°C）。此外，TPS3850 针对两阈值施加精确迟滞，使得该器件非常适用于容差要求严格的系统。该监控器的 RESET 延迟可通过经出厂编程的默认延迟设置进行设定，也可以通过外部电容以编程方式设定。出厂编程的 RESET 延迟具备 9.5% 精度、高精密延迟时间。

TPS3850 具备适用于多种应用的可编程窗口看门狗计时器。专用看门狗输出 (WDO) 有助于提高分辨率，从而帮助确定出现故障情况的根本原因。窗口看门狗超时可通过经出厂编程的默认延迟设置进行设定，也可以通过外部电容以编程方式设定。可通过逻辑引脚禁用看门狗，避免在开发过程中出现意外的看门狗超时。

TPS3850 采用小型 3.00mm ×
3.00mm 10 引脚 VSON 封装。

器件信息
器件型号 封装 (1) 封装尺寸（标称值）
TPS3850 VSON (10) 3.00mm × 3.00mm
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附录。
GUID-54277FD6-ED7C-4FFA-9708-E785A14117AF-low.gif全集成微控制器监控电路
GUID-52B110E9-FD37-432E-AE48-5AB1EED6394C-low.gif过压阈值 (VIT+(OV)) 精度与温度间的关系