SLUS791A July   2007  – September 2015 TPS28226

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Undervoltage Lockout (UVLO)
      2. 7.3.2 Output Active Low
      3. 7.3.3 Enable/Power Good
      4. 7.3.4 3-State Input
        1. 7.3.4.1 TPS28226 3-State Exit Mode
        2. 7.3.4.2 External Resistor Interference
      5. 7.3.5 Bootstrap Diode
      6. 7.3.6 Upper and Lower Gate Drivers
      7. 7.3.7 Dead-Time Control
      8. 7.3.8 Thermal Shutdown
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Four Phases Driven by TPS28226 Driver
        2. 8.2.2.2 Switching The MOSFETs
        3. 8.2.2.3 List of Materials
      3. 8.2.3 Application Curves
    3. 8.3 System Examples
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(3)
MIN MAX UNIT
Input supply voltage range, VDD (2) –0.3 8.8 V
Boot voltage, VBOOT –0.3 33 V
Phase voltage, VPHASE DC –2 32 or VBOOT + 0.3 – VDD whichever is less V
Pulse < 400 ns, E = 20 μJ –7 33.1 or VBOOT + 0.3 – VDD whichever is less V
Input voltage range, VPWM, VEN/PG –0.3 13.2 V
Output voltage range, VUGATE VPHASE – 0.3 VBOOT + 0.3, (VBOOT – VPHASE < 8.8) V
Pulse < 100 ns, E = 2 μJ VPHASE – 2 VBOOT + 0.3, (VBOOT – VPHASE < 8.8) V
Output voltage range, VLGATE –0.3 VDD + 0.3 V
Pulse < 100 ns, E = 2 μJ –2 VDD + 0.3 V
Continuous total power dissipation See Thermal Information
Operating virtual junction temperature range, TJ –40 150 °C
Operating ambient temperature range, TA –40 125 °C
Lead temperature (soldering, 10 sec.) 300 °C
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to GND unless otherwise noted. Currents are positive into, negative out of the specified terminal. Consult Packaging Section of the Data book for thermal limitations and considerations of packages.
(3) These devices are sensitive to electrostatic discharge; follow proper device handling procedures.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500 V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VDD Input supply voltage 6.8 7.2 8 V
VIN Power input voltage 3 32 V– VDD V
TJ Operating junction temperature range –40 125 °C

6.4 Thermal Information

THERMAL METRIC TPS28226 UNIT
VSON (DRB) SOIC (D)
8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 50.2 123.2 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 57.5 77.0 °C/W
RθJB Junction-to-board thermal resistance 25.9 63.5 °C/W
ψJT Junction-to-top characterization parameter 1.5 27.7 °C/W
ψJB Junction-to-board characterization parameter 26.0 63.0 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 9.5 N/A °C/W

6.5 Electrical Characteristics(1)

VDD = 7.2 V, EN/PG pulled up to VDD by 100-kΩ resistor, TA = TJ = –40°C to 125°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
UNDER VOLTAGE LOCKOUT
Rising threshold VPWM = 0 V 6.35 6.70 V
Falling threshold VPWM = 0 V 4.7 5.0 V
Hysteresis 1.00 1.35 V
BIAS CURRENTS
IDD(off) Bias supply current VEN/PG = low, PWM pin floating 350 μA
IDD Bias supply current VEN/PG = high, PWM pin floating 500 μA
INPUT (PWM)
IPWM Input current VPWM = 5 V 185 μA
VPWM = 0 V –200 μA
PWM 3-state rising threshold(2) 1.0 V
PWM 3-state falling threshold VPWM PEAK = 5 V 3.4 3.8 4.0 V
tHLD_R 3-state shutdown Hold-off time 250 ns
TMIN PWM minimum pulse to force UGATE pulse CL = 3 nF at UGATE , VPWM = 5 V 30 ns
ENABLE/POWER GOOD (EN/PG)
Enable high rising threshold PG FET OFF 1.7 2.1 V
Enable low falling threshold PG FET OFF 0.8 1.0 V
Hysteresis 0.35 0.70 V
Power good output VDD = 2.5 V 0.2 V
UPPER GATE DRIVER OUTPUT (UGATE)
Source resistance 500 mA source current 1.0 2.0 Ω
Source current (2) VUGATE-PHASE = 2.5 V 2.0 A
tRU Rise time CL = 3 nF 10 ns
Sink resistance 500 mA sink current 1.0 2.0 Ω
Sink current (2) VUGATE-PHASE = 2.5 V 2.0 A
tFU Fall time CL = 3 nF 10 ns
LOWER GATE DRIVER OUTPUT (LGATE)
Source resistance 500 mA source current 1.0 2.0 Ω
Source current(2) VLGATE = 2.5 V 2.0 A
tRL Rise time(2) CL = 3 nF 10 ns
Sink resistance 500 mA sink current 0.4 1.0 Ω
Sink current(2) VLGATE = 2.5 V 4.0 A
Fall time(2) CL = 3 nF 5 ns
BOOTSTRAP DIODE
VF Forward voltage Forward bias current 100 mA 1.0 V
THERMAL SHUTDOWN
Rising threshold(2) 150 160 170 °C
Falling threshold(2) 130 140 150 °C
Hysteresis 20 °C
(1) Typical values for TA = 25°C
(2) Not production tested.

6.6 Switching Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SWITCHING TIME
tDLU UGATE turn-off propagation Delay CL = 3 nF 14 ns
tDLL LGATE turn-off propagation Delay CL = 3 nF 14 ns
tDTU Dead time LGATE turn off to UGATE turn on CL = 3 nF 14 ns
tDTL Dead time UGATE turn off to LGATE turn on CL = 3 nF 14 ns
TPS28226 newtiming2_lus710.gif Figure 1. TPS28226 Timing Diagram

6.7 Typical Characteristics

TPS28226 wave1_lus710.gif
VEN/PG = Low PWM Input Floating VDD = 7.2 V
Figure 2. Bias Supply Current vs Temperature
TPS28226 wave3_lus710.gif
VDD = 7.2 V
Figure 4. Enable/Power Good Threshold vs Temperature
TPS28226 wave5_lus710.gif
VDD = 7.2 V
Figure 6. UGATE DC Output Impedance vs Temperature
TPS28226 wave7_lus710.gif
VDD = 7.2 V CLOAD = 3 nF
Figure 8. UGATE Rise and Fall Time vs Temperature
TPS28226 wave9_lus710.gif
VDD = 7.2 V CLOAD = 3 nF
Figure 10. UGATE and LGATE (Turning OFF Propagation Delays) vs Temperture
TPS28226 wave11_lus710.gif
VDD = 7.2 V CLOAD = 3 nF
Figure 12. UGATE Minimum Short Pulse vs Temperature
TPS28226 wave13_lus710.gif
No Load VDD = 7.2 V TJ = 25°C
Figure 14. Bias Supply Current vs Switching Frequency
TPS28226 wave15_lus710.gif
Figure 16. PWM Input Rising Switching Waveforms
TPS28226 wave17_lus710.gif
Figure 18. Minimum UGATE Pulse Switching Waveforms
TPS28226 wave2b_lus710.gif
Figure 3. Undervoltage Lockout Threshold vs Temperature
TPS28226 wave4_lus710.gif
VDD = 7.2 V
Figure 5. PWM 3-State Thresholds, (5-V Input Pulses) vs Temperature
TPS28226 wave6_lus710.gif
VDD = 7.2 V
Figure 7. LGATE DC Output Impedance vs Temperature
TPS28226 wave8_lus710.gif
VDD = 7.2 V CLOAD = 3 nF
Figure 9. LGATE Rise and Fall Time vs Temperature
TPS28226 wave10_lus710.gif
VDD = 7.2 V CLOAD = 3 nF
Figure 11. UGATE and LGATE (Dead Time) vs Temperture
TPS28226 wave12_lus710.gif
VDD = 7.2 V IF = 100 mA
Figure 13. Bootstrap Diode Forward Voltage vs Temperature
TPS28226 wave14_lus710.gif
Different Load Charge VDD = 7.2 V TJ = 25°C
Figure 15. Driver Dissipated Power vs Switching Frequency
TPS28226 wave16_lus710.gif
Figure 17. PWM Input Falling Switching Waveforms
TPS28226 wave18_lus710.gif
Figure 19. Normal and 3-State Operation Enter/Exit Conditions