SLIS135E December   2010  – February 2017

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Operating Characteristics
    7. 6.7 SPI Timing Requirements
    8. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Dual Channel, 256-Position Resolution
      2. 7.3.2 Non-Volatile Memory
    4. 7.4 Device Functional Modes
      1. 7.4.1 Voltage Divider Mode
      2. 7.4.2 Rheostat Mode
      3. 7.4.3 Ideal Resistance Values
    5. 7.5 Programming
      1. 7.5.1 SPI Digital Interface
    6. 7.6 Register Map
      1. 7.6.1 Digital Interface Format
      2. 7.6.2 Write-Wiper Register (Command 00)
      3. 7.6.3 Write-NV Register (Command 01)
      4. 7.6.4 Copy Wiper Register to NV Register (Command 10)
      5. 7.6.5 Copy NV Register to Wiper Register (Command 11)
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. Power Supply Recommendations
    1. 9.1 Power Sequence
    2. 9.2 Wiper Position Upon Power Up
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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Power Supply Recommendations

Power Sequence

Protection diodes limit the voltage compliance at terminal H, terminal L, and terminal W, making it important to power up VDD first before applying any voltage to terminal H, terminal L, and terminal W. The diodes are forward-biasing, meaning VDD can be powered unintentionally if VDD is not powered first. The ideal power-up sequence is VDD, digital inputs, and VH, VL, and VW. The order of powering digital inputs, VH, VL, and VW does not matter as long as they are powered after VDD.

Wiper Position Upon Power Up

It is prudent to know that when the DPOT is powered off, the impedance of the device is not known. Upon power-up, the device will go to 0x80h code for a brief period of time while it loads the stored wiper position from the EEPROM, then goes to the stored position. This process happens in less than 100 µs.