ZHCSAA4B September   2012  – September 2015 TPA3110D2-Q1

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1. 3.1 TPA3110D2-Q1 简化应用原理图
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 DC Characteristics
    6. 6.6 DC Characteristics
    7. 6.7 AC Characteristics
    8. 6.8 AC Characteristics
    9. 6.9 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 DC Detect
      2. 7.3.2 Short-Circuit Protection and Automatic Recovery Feature
      3. 7.3.3 Thermal Protection
      4. 7.3.4 GVDD Supply
    4. 7.4 Device Functional Modes
      1. 7.4.1 PBTL Select
      2. 7.4.2 Gain Setting Through GAIN0 and GAIN1 Inputs
      3. 7.4.3 SD Operation
      4. 7.4.4 PLIMIT
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 TPA3110D2-Q1 Modulation Scheme
        2. 8.2.2.2 Ferrite Bead Filter Considerations
        3. 8.2.2.3 Efficiency: LC Filter Required With the Traditional Class-D Modulation Scheme
        4. 8.2.2.4 When to Use an Output Filter for EMI Suppression
        5. 8.2.2.5 Input Resistance
        6. 8.2.2.6 Input Capacitor, CI
        7. 8.2.2.7 BSN and BSP Capacitors
        8. 8.2.2.8 Differential Inputs
        9. 8.2.2.9 Using Low-ESR Capacitors
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 器件支持
      1. 11.1.1 开发支持
    2. 11.2 文档支持
      1. 11.2.1 相关文档
    3. 11.3 社区资源
    4. 11.4 商标
    5. 11.5 静电放电警告
    6. 11.6 Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

7.4.4 PLIMIT

The PLIMIT pin limits the output peak-to-peak voltage based on the voltage supplied to the PLIMIT pin. The peak output voltage is limited to four times the voltage at the PLIMIT pin.

TPA3110D2-Q1 pwr_lim_los528.gifFigure 35. PLIMIT Circuit Operation

The PLIMIT circuit sets a limit on the output peak-to-peak voltage. The limiting is done by limiting the duty cycle to fixed maximum value. This limit can be thought of as a virtual voltage rail which is lower than the supply connected to PVCC. This virtual rail is four times the voltage at the PLIMIT pin. This output voltage can be used to calculate the maximum output power for a given maximum input voltage and speaker impedance.

Equation 1. TPA3110D2-Q1 q_plimit_los528.gif

Where:

RS is the total series resistance including RDS(on), and any resistance in the output filter.

RL is the load resistance.

VP is the peak amplitude of the output possible within the supply rail.

VP = 4 × PLIMIT voltage if PLIMIT < 4 × VP

POUT (10%THD) = 1.25 × POUT (unclipped)

Table 3. PLIMIT Typical Operation

TEST CONDITIONS PLIMIT VOLTAGE OUTPUT POWER (W) Output Voltage Amplitude (VP-P)
PVCC = 24 V, VIN = 1 VRMS,
RL = 8 Ω, Gain = 26 dB		 6.97 36.1 (thermally limited) 43
PVCC = 24 V, VIN = 1 VRMS,
RL = 8 Ω, Gain = 26 dB		 2.94 15 25.2
PVCC = 24 V, VIN = 1 VRMS,
RL = 8 Ω, Gain = 26 dB		 2.34 10 20
PVCC = 24 V, VIN = 1 VRMS,
RL = 8 Ω, Gain = 26 dB		 1.62 5 14
PVCC = 24 V, VIN = 1 VRMS,
RL = 8 Ω, Gain = 20 dB		 6.97 12.1 27.7
PVCC = 24 V, VIN = 1 VRMS,
RL = 8 Ω, Gain = 20 dB		 3 23
PVCC = 24 V, VIN = 1 VRMS,
RL = 8 Ω, Gain = 20 dB		 1.86 5 14.8
PVCC = 12 V, VIN = 1 VRMS,
RL = 8 Ω, Gain = 20 dB		 6.97 10.55 23.5
PVCC = 12 V, VIN = 1 VRMS,
RL = 8 Ω, Gain = 20 dB		 1.76 5 15