ZHCSLR4F december   2019  – july 2023 TMUX1308-Q1 , TMUX1309-Q1

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Revision History
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information: TMUX1308-Q1
    5. 7.5  Thermal Information: TMUX1309-Q1
    6. 7.6  Electrical Characteristics
    7. 7.7  Logic and Dynamic Characteristics
    8. 7.8  Timing Characteristics
    9. 7.9  Injection Current Coupling
    10. 7.10 Typical Characteristics
  9. Parameter Measurement Information
    1. 8.1  On-Resistance
    2. 8.2  Off-Leakage Current
    3. 8.3  On-Leakage Current
    4. 8.4  Transition Time
    5. 8.5  Break-Before-Make
    6. 8.6  tON(EN) and tOFF(EN)
    7. 8.7  Charge Injection
    8. 8.8  Off Isolation
    9. 8.9  Crosstalk
    10. 8.10 Bandwidth
    11. 8.11 Injection Current Control
  10. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Bidirectional Operation
      2. 9.3.2 Rail-to-Rail Operation
      3. 9.3.3 1.8 V Logic Compatible Inputs
      4. 9.3.4 Fail-Safe Logic
      5. 9.3.5 Injection Current Control
        1. 9.3.5.1 TMUX13xx-Q1 is Powered, Channel is Unselected, and the Input Signal is Greater Than VDD (VDD = 5 V, VINPUT = 5.5 V)
        2. 9.3.5.2 TMUX13xx-Q1 is Powered, Channel is Selected, and the Input Signal is Greater Than VDD (VDD = 5 V, VINPUT = 5.5 V)
        3. 9.3.5.3 TMUX13xx-Q1 is Unpowered and the Input Signal has a Voltage Present (VDD = 0 V, VINPUT = 3 V)
    4. 9.4 Device Functional Modes
    5. 9.5 Truth Tables
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Short To Battery Protection
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 支持资源
    4. 11.4 Trademarks
    5. 11.5 静电放电警告
    6. 11.6 术语表
  13. 12Mechanical, Packaging, and Orderable Information

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Fail-Safe Logic

The TMUX1308-Q1 and TMUX1309-Q1 device have Fail-Safe Logic on the control input pins (EN, A0, A1, and A2) allowing for operation up to 5.5-V, regardless of the state of the supply pin. This feature allows voltages on the control pins to be applied before the supply pin, protecting the device from potential damage. Fail-Safe Logic minimizes system complexity by removing the need for power supply sequencing on the logic control pins. For example, the Fail-Safe Logic feature allows the select pins of the TMUX1308-Q1 and TMUX1309-Q1 to be ramped to 5.5-V while VDD = 0-V. Additionally, the feature enables operation of the multiplexers with VDD = 1.8-V while allowing the select pins to interface with a logic level of another device up to 5.5-V, eliminating the potential need for an external voltage translator.