ZHCSF22 May   2016 TLC6C5912

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
  4. 修订历史记录
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Thermal Shutdown
      2. 8.3.2 Serial-In Interface
      3. 8.3.3 Clear Register
      4. 8.3.4 Cascade Through SER OUT
      5. 8.3.5 Output Control
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation With VCC < 3 V
      2. 8.4.2 Operation With 5.5 V ≤ VCC ≤ 8 V
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 社区资源
    2. 12.2 商标
    3. 12.3 静电放电警告
    4. 12.4 Glossary
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

8 Detailed Description

8.1 Overview

The TLC6C5912 device is a monolithic, medium-voltage, low current 12-bit shift register designed to drive relatively moderate load power such LEDs. The device contains a 12-bit serial-in, parallel-out shift register that feeds a 12-bit D-type storage register. Thermal shutdown protection is also built-into the device.

8.2 Functional Block Diagram

TLC6C5912 Logic_Diag_SLIS141.gif

8.3 Feature Description

8.3.1 Thermal Shutdown

The device implements an internal thermal shutdown to protect itself if the junction temperature exceeds 175°C (typical). The thermal shutdown forces the device to have an open state when the junction temperature exceeds the thermal trip threshold. Once the junction temperature decreases to less than 160°C (typical), the device begins to operate again.

8.3.2 Serial-In Interface

The TLC6C598 device contains an 8-bit serial-in, parallel out shift register that feeds an 8-bit D-type storage register. Data transfer through both the shift and storage registers on the rising edge of the shift register clock (SRCK) and the register clock (RCK), respectively. The storage transfers data to the output buffer when shift register clear (CLR) is high.

8.3.3 Clear Register

A logic low on CLR clears all registers in the device. TI suggests clearing the device during power up or initialization.

8.3.4 Cascade Through SER OUT

By connecting the SER OUT pin to the SER IN input of the next device on the serial bus to cascade, the data transfers to the next device on the falling edge of SRCK. This can improve the cascade application reliability, as it can avoid that the second device receives SRCK and data input at the same rising edge of SRCK.

8.3.5 Output Control

Holding the output enable (G) high holds all data in the output buffers low, and all drain outputs are off. Holding G low makes data from the storage register transparent to the output buffers. When data in the output buffers is low, the DMOS transistor outputs are off. When data is high, the DMOS transistor outputs are capable of sink-current. This pin also be used for global PWM dimming.

8.4 Device Functional Modes

8.4.1 Operation With VCC < 3 V

This device works normally during 3 V ≤ VCC ≤ 5.5 V, when operation voltage is lower than 3 V. The behavior of device cannot be ensured, including communication interface and current capability.

8.4.2 Operation With 5.5 V ≤ VCC ≤ 8 V

The device works normally during this voltage range, but reliability issues may occurs while the device works for a long time in this voltage range.