ZHCSQB3A january   2023  – july 2023 THS2630

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power-Down Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Output Common-Mode Voltage
        1. 8.1.1.1 Resistor Matching
      2. 8.1.2 Driving a Capacitive Load
      3. 8.1.3 Data Converters
      4. 8.1.4 Single-Supply Applications
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Active Antialias Filtering
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 PowerPAD™ Integrated Circuit Package Design Considerations
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 接收文档更新通知
    3. 9.3 支持资源
    4. 9.4 Trademarks
    5. 9.5 静电放电警告
    6. 9.6 术语表
  11. 10Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

5 Pin Configuration and Functions

GUID-20230713-SS0I-H873-KJNH-9WVHVLJXHVLM-low.svgFigure 5-1 D Package, 8-Pin SOIC
DGK Package, 8-Pin VSSOP
or DGN Package, 8-Pin HVSSOP
THS2630S (Top View)
GUID-20230713-SS0I-HSMR-8ZPL-JXNGNDPWGGT6-low.svgFigure 5-2 D Package, 8-Pin SOIC
DGK Package, 8-Pin VSSOP
or DGN Package, 8-Pin HVSSOP
THS2630 (Top View)
Table 5-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME NO.
THS2630S THS2630
IN– 1 1 I Negative input pin
IN+ 8 8 I Positive input pin
NC — 7 — This pin is not internally connected; leave floating or connect to any other pin on the device.
OUT– 5 5 O Negative output pin
OUT+ 4 4 O Positive output pin
PD 7 — I Active low power-down pin
VCC+ 3 3 I/O Positive supply voltage pin
VCC– 6 6 I/O Negative supply voltage pin
VOCM 2 2 I Common mode input pin
Thermal Pad Thermal Pad Thermal Pad — Thermal pad. DGN (HVSSOP) package only. For the best thermal performance, connect this pad to a large copper plane. The thermal pad can be connected to any pin on the device, or any other potential on the board, as long as the voltage on the thermal pad remains between VCC+ and VCC–.
(1) I = input, O = output