ZHCSQB3A january   2023  – july 2023 THS2630

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power-Down Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Output Common-Mode Voltage
        1. 8.1.1.1 Resistor Matching
      2. 8.1.2 Driving a Capacitive Load
      3. 8.1.3 Data Converters
      4. 8.1.4 Single-Supply Applications
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Active Antialias Filtering
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 PowerPAD™ Integrated Circuit Package Design Considerations
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 接收文档更新通知
    3. 9.3 支持资源
    4. 9.4 Trademarks
    5. 9.5 静电放电警告
    6. 9.6 术语表
  11. 10Mechanical, Packaging, and Orderable Information

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7.4.1 Power-Down Mode

Power-down mode is used when power saving is required. The THS2630S power-down (PD) pin is an active low input. If left unconnected, an internal 250‑kΩ resistor to VCC+ keeps the device turned on. The threshold voltage for the power-down function is approximately 1.4 V greater than VCC–. If the PD pin is 1.4 V greater than VCC–, the device is active. If the PD pin is less than 1.4 V greater than VCC–, the device is off. Pull the pin to VCC– to turn the device off. Figure 7-3 shows the simplified version of the power-down circuit. While in the power-down state, the amplifier goes into a high-impedance state. The amplifier output impedance is typically greater than 1 MΩ in the power-down state.

GUID-A5DE8300-600C-4EAA-BAFC-51AD89817F37-low.svgFigure 7-3 Simplified Power-Down Circuit

Similar to an op amp in an inverting configuration, the output impedance of an FDA is determined by the feedback network configuration. In addition, the THS2630S has an internal 10‑kΩ resistor at each output that is tied to the VCM error amplifier (see Section 7.2). The differential output impedance is equal to [(2 × RF + 2 × RG) || 20 kΩ]. Figure 7-4 shows the closed-loop output impedance of the THS2630S when in power-down.

GUID-DCB05110-FE0A-4F0D-8216-3B4A4231ED41-low.svg
VCC = ±5 V, gain = 1 V/V, RF = 1 kΩ, PD = VCC–
Figure 7-4 Output Impedance (in Power-Down) vs Frequency