ZHCS616E March   2012  – February 2017 TCA9554

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      简化框图
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 I/O Port
      2. 8.3.2 Interrupt Output (INT)
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-On Reset
    5. 8.5 Programming
      1. 8.5.1 I2C Interface
    6. 8.6 Register Maps
      1. 8.6.1 Device Address
      2. 8.6.2 Control Register and Command Byte
      3. 8.6.3 Register Descriptions
        1. 8.6.3.1 Bus Transactions
          1. 8.6.3.1.1 Writes
          2. 8.6.3.1.2 Reads
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Calculating Junction Temperature and Power Dissipation
        2. 9.2.1.2 Minimizing ICC when I/Os Control LEDs
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power-On Reset Requirements
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 文档支持
      1. 12.1.1 相关文档
    2. 12.2 接收文档更新通知
    3. 12.3 社区资源
    4. 12.4 商标
    5. 12.5 静电放电警告
    6. 12.6 Glossary
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

6.5 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETERTEST CONDITIONSVCCMINTYP(1)MAXUNIT
VIK Input diode clamp voltage II = –18 mA 1.65 V to 5.5 V –1.2 V
VPORR Power-on reset voltage, VCC rising VI = VCC or GND, IO = 0 1.2 1.5 V
VPORF Power-on reset voltage, VCC falling VI = VCC or GND, IO = 0 0.75 1 V
VOH P-port high-level output voltage(2) IOH = –8 mA 1.65 V 1.2
2.3 V 1.8 V
3 V 2.6
4.5 V 4.1
IOH = –10 mA 1.65 V 1.1
2.3 V 1.7
3 V 2.5
4.5 V 4
IOL SDA(4) VOL = 0.4 V 1.65 V to 5.5 V 3 11 mA
P port(3) VOL = 0.5 V 1.65 V 8 10
2.3 V 8 13
3 V 8 15
4.5 V 8 17
VOL = 0.7 V 1.65 V 10 14
2.3 V 10 17
3 V 10 20
4.5 V 10 24
INT(5) VOL = 0.4 V 1.65 V to 5.5 V 3 7
II SCL, SDA VI = VCC or GND 1.65 V to 5.5 V ±1 µA
A0, A1, A2 ±1
IIH P port VI  = VCC 1.65 V to 5.5 V 1 µA
IIL P port VI  = GND 1.65 V to 5.5 V –100 µA
ICC Operating mode VI = VCC or GND, IO = 0, I/O = inputs,
fSCL = 400 kHz, no load, tr,max = 300 ns		 5.5 V 34 µA
3.6 V 15
2.7 V 9
1.65 V 5
Standby mode I/O = inputs,
fSCL = 0 kHz 		VI = VCC 5.5 V 1.9 3.5
3.6 V 1.1 1.8
2.7 V 1 1.6
1.95 V 0.4 1
VI = GND 5.5 V 0.45 0.7 mA
3.6 V 0.3 0.6
2.7 V 0.23 0.5
1.95 V 0.23 0.5
Ci SCL VI = VCC or GND 1.65 V to 5.5 V 3 8 pF
Cio SDA VIO = VCC or GND 1.65 V to 5.5 V 5.5 9.5 pF
P port 8 9.5
(1) All typical values are at nominal supply voltage (1.8-, 2.5-, 3.3-, or 5-V VCC) and TA = 25°C.
(2) Each P-port I/O configured as a high output must be externally limited to a maximum of 10 mA, and the total current sourced by all I/Os (P-ports P7-P0) through VCC must be limited to a maximum current of 80 mA.
(3) Each P-port I/O configured as a low output must be externally limited to a maximum of 25 mA, and the total current sunk by all I/Os (P-ports P7-P0, INT, and SDA) through GND must be limited to a maximum current of 200 mA.
(4) The SDA pin must be externally limited to a maximum of 12 mA, and the total current sunk by all I/Os (P-ports P7-P0, INT, and SDA) through GND must be limited to a maximum current of 200 mA.
(5) The INT pin must be externally limited to a maximum of 7 mA, and the total current sunk by all I/Os (P-ports P7-P0, INT, and SDA) through GND must be limited to a maximum current of 200 mA.