ZHCSFH3A September   2016  – February 2023 TCA6408A-Q1

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Requirements
    7. 6.7 Reset Timing Requirements
    8. 6.8 Switching Characteristics
    9. 6.9 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Voltage Translation
      2. 8.3.2 I/O Port
      3. 8.3.3 Interrupt Output ( INT)
      4. 8.3.4 Reset Input ( RESET)
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-On Reset (POR)
      2. 8.4.2 Powered-Up
    5. 8.5 Programming
      1. 8.5.1 I2C Interface
      2. 8.5.2 Bus Transactions
        1. 8.5.2.1 Writes
        2. 8.5.2.2 Reads
    6. 8.6 Register Map
      1. 8.6.1 Device Address
      2. 8.6.2 Control Register and Command Byte
      3. 8.6.3 Register Descriptions
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Calculating Junction Temperature and Power Dissipation
        2. 9.2.1.2 Minimizing ICC When I/O is Used to Control LEDs
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 Power-On Reset Requirements
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 商标
    3. 10.3 静电放电警告
    4. 10.4 术语表
  11. 11支持资源
  12. 12Mechanical, Packaging, and Orderable Information

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机械数据 (封装 | 引脚)
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订购信息

I2C Interface Timing Requirements

over recommended operating free-air temperature range (unless otherwise noted) (see GUID-13F32CF5-8DFA-4BC1-8307-F5B0EFC783F6.html#SCPS2341538)
MINMAXUNIT
I2C BUS—STANDARD MODE
fsclI2C clock frequency0100kHz
tschI2C clock high time4μs
tsclI2C clock low time4.7μs
tspI2C spike time050ns
tsdsI2C serial data setup time250ns
tsdhI2C serial data hold time0ns
ticrI2C input rise time1000ns
ticfI2C input fall time300ns
tocfI2C output fall time, 10-pF to 400-pF bus300ns
tbufI2C bus free time between Stop and Start4.7μs
tstsI2C Start or repeater Start condition setup time4.7μs
tsthI2C Start or repeater Start condition hold time4μs
tspsI2C Stop condition setup time4μs
tvd(data)Valid data time, SCL low to SDA output valid1μs
tvd(ack)Valid data time of ACK condition, ACK signal from SCL low to SDA (out) low1μs
I2C BUS—FAST MODE
fsclI2C clock frequency0400kHz
tschI2C clock high time0.6μs
tsclI2C clock low time1.3μs
tspI2C spike time050ns
tsdsI2C serial data setup time100ns
tsdhI2C serial data hold time0ns
ticrI2C input rise time20300ns
ticfI2C input fall time20 x (Vcc/ 5.5 V)300ns
tocfI2C output fall time, 10-pF to 400-pF bus20 x (Vcc/ 5.5 V)300ns
tbufI2C bus free time between Stop and Start1.3μs
tstsI2C Start or repeater Start condition setup time0.6μs
tsthI2C Start or repeater Start condition hold time0.6μs
tspsI2C Stop condition setup time0.6μs
tvd(data)Valid data time, SCL low to SDA output valid1μs
tvd(ack)Valid data time of ACK condition, ACK signal from SCL low to SDA (out) low1μs