SCES219W April   1999  – August 2026 SN74LVC1G32

PRODUCTION DATA  

  1.   1
  2.   2
  3. 1 Features
  4. 2 Applications
  5. 3 Description
  6. 4 Pin Configuration and Functions
  7. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Switching Characteristics, CL = 15 pF
    7. 5.7  Switching Characteristics, 1.8 V and 2.5V
    8. 5.8  Switching Characteristics, 3.3 V and 5 V
    9. 5.9  Operating Characteristics
    10. 5.10 Typical Characteristics
  8. 6 Parameter Measurement Information
  9. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Balanced CMOS Push-Pull Outputs
      2. 7.3.2 Partial Power Down (Ioff)
      3. 7.3.3 Standard CMOS Inputs
      4. 7.3.4 Clamp Diode Structure
      5. 7.3.5 Over-Voltage Tolerant Inputs
    4. 7.4 Device Functional Modes
  10. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Power Considerations
        2. 8.2.1.2 Input Considerations
        3. 8.2.1.3 Output Considerations
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  11. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  12.   50
  13. 10Revision History
  14. 11Mechanical, Packaging, and Orderable Information

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4 Pin Configuration and Functions

SN74LVC1G32 DBV or DCK or DRL Package, 5-Pin SOT-23 or SOT-SC70SOT (Top View) Figure 4-1 DBV or DCK or DRL Package,
5-Pin SOT-23 or SOT-SC70SOT (Top View)
SN74LVC1G32 DPW Package, 5-Pin X2SON (Top View) Figure 4-2 DPW Package,
5-Pin X2SON (Top View)
SN74LVC1G32 YZP Package, 5-Pin DSBGA (Top View) Figure 4-3 YZP Package, 5-Pin DSBGA (Top View)
Table 4-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NO. NAME
1 A I Input A
2 B I Input B
3 GND G Ground Pin
4 Y O Output Y
5 VCC P Power Pin
(1) Signal Types: I = Input, O = Output, I/O = Input or Output, P = Supply, G = Ground
SN74LVC1G32 DRY or DSF Package, 6-Pin SON (Top View) Figure 4-4 DRY or DSF Package,
6-Pin SON (Top View)
Table 4-2 Pin Functions
PIN TYPE(1) DESCRIPTION
NO. NAME
1 A I Input A
2 B I Input B
3 GND G Ground Pin
4 Y O Output Y
5 NC — No internal connection
6 VCC P Power Pin
(1) Signal Types: I = Input, O = Output, I/O = Input or Output, P = Supply, G = Ground