SCES656E February   2006  – November 2016 SN74LV4046A

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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机械数据 (封装 | 引脚)
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订购信息

5 Pin Configuration and Functions

D, DGV, NS, N, or PW Package
16-Pin SOIC, TVSOP, SO, PDIP, or TSSOP
Top View
SN74LV4046A po_ces656.gif

Pin Functions

PIN I/O DESCRIPTION
NO. NAME
1 PCPOUT O Phase comparator pulse output
2 PC1OUT O Phase comparator 1 output
3 COMPIN I Comparator input
4 VCOOUT O VCO output
5 INH I Inhibit input
6 C1A — Capacitor C1 connection A
7 C1B — Capacitor C1 connection B
8 GND — Ground (0 V)
9 VCOIN I VCO input
10 DEMOUT O Demodulator output
11 R1 — Resistor R1 connection
12 R2 — Resistor R2 connection
13 PC2OUT O Phase comparator 2 output
14 SIGIN I Signal input
15 PC3OUT O Phase comparator 3 output
16 VCC — Positive supply voltage