ZHCSVZ9H June   1998  – April 2024 SN74AHC594

PRODMIX  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Timing Requirements, VCC = 3.3 V ± 0.3 V
    7. 5.7  Timing Requirements, VCC = 5 V ± 0.5 V
    8. 5.8  Switching Characteristics, VCC = 3.3 V ± 0.3 V
    9. 5.9  Switching Characteristics, VCC = 5 V ± 0.5 V
    10. 5.10 Noise Characteristics
    11. 5.11 Operating Characteristics
    12. 5.12 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support (Analog)
      1. 9.1.1 Related Links
    2. 9.2 接收文档更新通知
    3. 9.3 支持资源
    4. 9.4 Trademarks
    5. 9.5 静电放电警告
    6. 9.6 术语表
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • PW|16
  • DB|16
  • NS|16
  • N|16
  • D|16
散热焊盘机械数据 (封装 | 引脚)
订购信息

4 Pin Configuration and Functions

GUID-B7549A5A-E18B-42C9-8B78-735B08CE5DB9-low.gif
GUID-EBA01F89-39DA-45A3-B97F-D024C915B1D3-low.gif
Table 4-1 Pin Functions
Pin I/O Description
Name SN54AHC594 SN74AHC594
FK J, W D, DB, N,
NS, PW
GND 10 8 8 — Ground Pin
NC 1 — — — No connect
6
11
16
QA 19 15 15 O QA Output
QB 2 1 1 O QB Output
QC 3 2 2 O QC Output
QD 4 3 3 O QD Output
QE 5 4 4 O QE Output
QF 7 5 5 O QF Output
QG 8 6 6 O QG Output
QH 9 7 7 O QH Output
QH' 12 9 9 O QH' Output
RCLK 15 12 12 I RCLK Input
RCLR 17 13 13 I RCLR Input
SER 18 14 14 I SER Input
SRCLK 14 11 11 I SRCLK Input
SRCLR 13 10 10 I SRCLR Input
VCC 20 16 16 — Power pin