SLLS804D March   2009  – August 2016 SN65HVDA540-5-Q1 , SN65HVDA540-Q1 , SN65HVDA541-5-Q1 , SN65HVDA541-Q1 , SN65HVDA542-5-Q1 , SN65HVDA542-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Power Dissipation Ratings
    7. 6.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Digital Inputs and Outputs
      2. 8.3.2 TXD Dominant State Time Out
      3. 8.3.3 Thermal Shutdown
      4. 8.3.4 Undervoltage Lockout and Unpowered Device
      5. 8.3.5 Floating Pins
      6. 8.3.6 CAN Bus Short-Circuit Current Limiting
    4. 8.4 Device Functional Modes
      1. 8.4.1 Bus States by Mode
      2. 8.4.2 Normal Mode
      3. 8.4.3 Standby Mode (HVDA540)
      4. 8.4.4 Standby Mode With RXD Wake Up-Request (HVDA541)
        1. 8.4.4.1 RXD Wake Up Request Lock Out for Bus Stuck Dominant Fault (HVDA541)
      5. 8.4.5 Silent (Receive Only) Mode (HVDA542)
      6. 8.4.6 Driver and Receiver Function Tables
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 3.3-V I/O Voltage Level and Normal Mode
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Loop Propagation Delay
        3. 9.2.1.3 Application Curves
    3. 9.3 System Examples
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Examples
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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8 Detailed Description

8.1 Overview

The device meets or exceeds the specifications of the ISO 11898 High Speed CAN (Controller Area Network) Physical Layer standard (transceiver). This device provides CAN transceiver functions: differential transmit capability to the bus and differential receive capability at data rates up to 1 megabit per second (Mbps). The device includes many protection features providing device and CAN network robustness.

8.2 Functional Block Diagrams

SN65HVDA540-Q1 SN65HVDA541-Q1 SN65HVDA542-Q1 SN65HVDA540-5-Q1 SN65HVDA541-5-Q1 SN65HVDA542-5-Q1 fbd_lls804.gif
HVDA54x devices pin 5 is VIO. HVDA54x-5 devices pin 5 is NC and VIO is internally connected to VCC.
Figure 13. HVDA54x Functional Block Diagram
SN65HVDA540-Q1 SN65HVDA541-Q1 SN65HVDA542-Q1 SN65HVDA540-5-Q1 SN65HVDA541-5-Q1 SN65HVDA542-5-Q1 fbd_1_lls804.gif
HVDA54x-5 devices: VIO is internally connected to VCC
Figure 14. HVDA54x-5 Functional Block Diagram

8.3 Feature Description

8.3.1 Digital Inputs and Outputs

The HVDA54x devices have an I/O supply voltage input pin (VIO) to ratiometrically level shift the digital logic input and output levels with respect to VIO for compatibility with protocol controllers having I/O supply voltages between 3 V and 5.33 V.

The HVDA54x-5 devices have a single VCC supply (5 V). The digital logic input and output levels for these devices are with respect to VCC for compatibility with protocol controllers having I/O supply voltages between 4.68 V and 5.33 V.

8.3.2 TXD Dominant State Time Out

During normal mode, the only mode where the CAN driver is active, the TXD dominant time out circuit prevents the transceiver from blocking network communication in event of a hardware or software failure where TXD is held dominant longer than the time-out period t(DOM). The dominant time out circuit is triggered by a falling edge on TXD. If no rising edge is seen before the time out constant of the circuit expires (t(DOM)) the CAN bus driver is disabled freeing the bus for communication between other network nodes. The CAN driver is reactivated when a recessive signal is seen on TXD pin, thus clearing the dominant state time out. The CAN bus pins is biased to recessive level during a TXD dominant state time out.

NOTE

The maximum dominant TXD time allowed by the TXD Dominant state time out limits the minimum possible data rate of the device. The CAN protocol allows a maximum of eleven successive dominant bits (on TXD) for the worst case, where five successive dominant bits are followed immediately by an error frame. This, along with the t(DOM) minimum, limits the minimum bit rate.

The minimum bit rate may be calculated in Equation 1:

Equation 1. Minimum Bit Rate = 11/t(DOM)

8.3.3 Thermal Shutdown

If the junction temperature of the device exceeds the thermal shut down threshold the device will turn off the CAN driver circuits. This condition is cleared once the temperature drops below the thermal shut down temperature of the device. The CAN bus pins will be biased to recessive level during a thermal shutdown.

8.3.4 Undervoltage Lockout and Unpowered Device

Both of the supply pins have undervoltage detection which place the device in forced standby mode to protect the bus during an undervoltage event on either the VCC or VIO supply pins. If VIO is undervoltage the RXD pin is tri-stated and the device does not pass any wake-up signals from the bus to the RXD pin. Since the device is placed into forced standby mode the CAN bus pins have a common mode bias to ground protecting the CAN network, see Figure 15 and Figure 16.

The device is designed to be an ideal passive load to the CAN bus if it is unpowered. The bus pins (CANH, CANL) have extremely low leakage currents when the device is unpowered so they will not load down the bus but rather be no load. This is critical, especially if some nodes of the network will be unpowered while the rest of the network remains in operation.

NOTE

Once an undervoltage condition is cleared and the VCC and VIO have returned to valid levels the device will typically need 300 µs to transition to normal operation.

Table 2. Undervoltage Protection

DEVICE VCC VIO DEVICE STATE BUS RXD
HVDA540 Bad Good Forced Standby Mode Common mode bias to GND(1) HIGH (Recessive)
HVDA541 Forced Standby Mode Common mode bias to GND(1) Mirrors bus state via wake-up filter(3)
HVDA542 Forced Standby Mode Common mode bias to GND(1) HIGH (Recessive)
HVDA54x Good Bad Forced Standby Mode(2) Common mode bias to GND(1) tri-state
HVDA54x-5 Bad N/A Forced Standby Mode Common mode bias to GND(1) HIGH (Recessive) or tri-state
All Devices Unpowered Unpowered No Load High Z
(1) See Figure 15 and Figure 16 for common mode bias information.
(2) When VIO is undervoltage, the device is forced into standby mode with respect to the CAN bus since there is not a valid digital reference to determine the digital I/O states or power the wake-up receiver.
(3) See Figure 17 and Figure 18 for operation of the low power wake up receiver and bus monitor for RXD Wake Up Request behavior and Table 5 for the wake up receiver threshold levels.

8.3.5 Floating Pins

The device has integrated pullup and pulldowns on critical pins to place the device into known states if the pins float. The TXD pin is pulled up to VIO to force a recessive input level if the pin floats. The STB is pulled up to the IO supply pin, VIO(HVDA540 and HVDA541), or VCC (HVDA540-5 and HVDA541-5) to force the device in standby mode (low power) if the pin floats. The S pin is pulled down to GND to force the device into normal mode if the pin floats (HVDA542 and HVDA542-5).

8.3.6 CAN Bus Short-Circuit Current Limiting

The device has several protection features that limit the short circuit current when a CAN bus line is shorted. These include CAN driver current limiting (dominant and recessive) and TXD dominant state time out to prevent continuously driving dominant. During CAN communication the bus switches between dominant and recessive states, thus the short circuit current may be viewed either as the current during each bus state or as a DC average current. For system current and power considerations in termination resistance and common mode choke ratings the average short circuit current should be used. The device has TXD dominant state time out which prevents permanently having the higher short circuit current of dominant state. The CAN protocol also has forced state changes and recessive bits such as bit stuffing, control fields, and interframe space. These ensure there is a minimum recessive amount of time on the bus even if the data field contains a high percentage of dominant bits.

NOTE

The short circuit current of the bus depends on the ratio of recessive to dominant bits and their respective short circuit currents.

The average short circuit current may be calculated by Equation 2:

Equation 2. IOS(AVG) = %Transmit * [(%REC_Bits * IOS(SS)_REC) + (%DOM_Bits * IOS(SS)_DOM)] + [%Receive * IOS(SS)_REC]

where

  • IOS(AVG) is the average short circuit current,
  • %Transmit is the percentage the node is transmitting CAN messages,
  • %Receive is the percentage the node is receiving CAN messages,
  • %REC_Bits is the percentage of recessive bits in the transmitted CAN messages,
  • %DOM_Bits is the percentage of dominant bits in the transmitted CAN messages,
  • IOS(SS)_REC is the recessive steady state short circuit current
  • and IOS(SS)_DOM is the dominant steady-state short circuit current.

8.4 Device Functional Modes

The device has two main operating modes: normal mode (all devices) and standby mode (HVDA540 / 541) or silent mode (HVDA542). Operating mode selection is made through the STB (HVDA540 / 541) or the S (HVDA542) input pin.

Table 3. Operating Modes

DEVICE STB / S MODE DRIVER RECEIVER RXD Pin
All Devices LOW Normal Mode Enabled (On) Enabled (On) Mirrors bus state(1)
HVDA540 HIGH Standby Mode (No Wake Up) Disabled (Off) Disabled (Off) Recessive (HIGH)
HVDA541 HIGH Standby Mode (RXD Wake Up Request) Disabled (Off) Low power wake-up receiver and bus monitor enabled Mirrors bus state via wake-up filter(2)
HVDA542 HIGH Silent Mode Disabled (Off) Enabled (On) Mirrors bus state(1)
(1) Mirrors bus state: LOW if CAN bus is dominant, HIGH if CAN bus is recessive.
(2) See Figure 17 and Figure 18 for operation of the low power wake up receiver and bus monitor for RXD Wake Up Request behavior and Table 5 for the wake up receiver threshold levels.

8.4.1 Bus States by Mode

The CAN bus has three valid states during powered operation depending on the mode of the device. In normal mode the bus may be dominant (logic LOW) where the bus lines are driven differentially apart or recessive (logic HIGH) where the bus lines are biased to VCC/2 via the high-ohmic internal input resistors RIN of the receiver. The third state is low power standby mode where the bus lines will be biased to GND via the high-ohmic internal input resistors RIN of the receiver.

SN65HVDA540-Q1 SN65HVDA541-Q1 SN65HVDA542-Q1 SN65HVDA540-5-Q1 SN65HVDA541-5-Q1 SN65HVDA542-5-Q1 bus_states_physical_bit_lls804.gif Figure 15. Bus States (Physical Bit Representation)
SN65HVDA540-Q1 SN65HVDA541-Q1 SN65HVDA542-Q1 SN65HVDA540-5-Q1 SN65HVDA541-5-Q1 SN65HVDA542-5-Q1 simplified_common_mode_bias_lls804.gif Figure 16. Simplified Common Mode Bias and Receiver Implementation

8.4.2 Normal Mode

This is the normal operating mode of the device. It is selected by setting STB or S low. The CAN driver and receiver are fully operational and CAN communication is bidirectional. The driver is translating a digital input on TXD to a differential output on CANH and CANL. The receiver is translating the differential signal from CANH and CANL to a digital output on RXD. In recessive state the CAN bus pins (CANH and CANL) are biased to
0.5 × VCC. In dominant state the bus pins are driven differentially apart. Logic high is equivalent to recessive on the bus and logic low is equivalent to a dominant (differential) signal on the bus.

8.4.3 Standby Mode (HVDA540)

This is the low power mode of the device. It is selected by setting STB high. The CAN driver and receiver are turned off and bidirectional CAN communication is not possible. There is no wake up capability in the HVDA540, the RXD pin will remain recessive (high) while the device is in standby mode. This state is supplied via the VIO supply, thus the VCC (5V) supply may be turned off for additional power savings at the system level. The local protocol controller (MCU) should reactivate the device to normal mode to enable communication via the CAN bus. The 5 V (VCC) supply needs to be reactivated by the local protocol controller to resume normal mode if it has been turned off for low-power standby operation. The CAN bus pins are weakly pulled to GND, see Figure 15 and Figure 16.

8.4.4 Standby Mode With RXD Wake Up-Request (HVDA541)

This is the low power mode of the device. It is selected by setting STB high. The CAN driver and main receiver are turned off and bidirectional CAN communication is not possible. The low power receiver and bus monitor, both supplied via the VIO supply, are enabled to allow for RXD wake up requests via the CAN bus. The VCC (5V) supply may be turned off for additional power savings at the system level. A wake up request will be output to RXD (driven low) for any dominant bus transmissions longer than the filter time tBUS. The local protocol controller (MCU) should monitor RXD for transitions and then reactivate the device to normal mode based on the wake up request. The 5 V (VCC) supply needs to be reactivated by the local protocol controller to resume normal mode if it has been turned off for low-power standby operation. The CAN bus pins are weakly pulled to GND, see Figure 15 and Figure 16.

8.4.4.1 RXD Wake Up Request Lock Out for Bus Stuck Dominant Fault (HVDA541)

If the bus has a fault condition where it is stuck dominant while the HVDA541 is placed into standby mode via the STB pin, the device locks out the RXD wake up request until the fault has been removed to prevent false wake up signals in the system.

SN65HVDA540-Q1 SN65HVDA541-Q1 SN65HVDA542-Q1 SN65HVDA540-5-Q1 SN65HVDA541-5-Q1 SN65HVDA542-5-Q1 ent_stby_rec_lls804.gif Figure 17. HVDA541 RXD Wake Up Request With No Bus Fault Condition
SN65HVDA540-Q1 SN65HVDA541-Q1 SN65HVDA542-Q1 SN65HVDA540-5-Q1 SN65HVDA541-5-Q1 SN65HVDA542-5-Q1 ent_stby_dom_lls804.gif Figure 18. HVDA541 RXD Wake Up Request Lock Out When Bus Dominant Fault Condition

8.4.5 Silent (Receive Only) Mode (HVDA542)

This is the silent (receive only) mode of the device. It is selected by setting S high. The CAN driver is turned off while the receiver remains active and RXD will output the received bus state. There is no low power mode in the HVDA542 except for VCC and VIO supply undervoltage conditions (see Undervoltage Lockout and Unpowered Device).

8.4.6 Driver and Receiver Function Tables

Table 4. Driver Function Table

INPUTS OUTPUTS DRIVEN BUS STATE
DEVICE STB / S(1) TXD(1) CANH(1) CANL(1)
All Devices L L H L Dominant
L H Z Z Recessive
L Open Z Z Recessive
HVDA540/541(2) H X Y Y Recessive
HVDA542(3) H X Z Z Recessive
(1) H = high level, L = low level, X = irrelevant, Y = common mode bias to GND, Z = common mode bias to VCC/2. See Figure 15 and Figure 16 for common mode bias information.
(2) HVDA540/541 have internal pull up to VIO on STB pin. If STB pin is open the pin will be pulled high and the device will be in standby mode.
(3) HVDA542 has internal pulldown to GND on S pin. If S pin is open the pin will be pulled low and the device will be in normal mode.

Table 5. Receiver Function Table

DEVICE MODE CAN DIFFERENTIAL INPUTS
VID = V(CANH) – V(CANL)
BUS STATE RXD PIN(1)
STANDBY (HVDA540)(2) X X H
STANDBY WITH RXD WAKE UP REQUEST (HVDA541)(3) VID ≥ 1.15 V DOMINANT L
0.4 V < VID < 1.15 V ? ?
VID ≤ 0.4 V RECESSIVE H
NORMAL OR SILENT VID ≥ 0.9 V DOMINANT L
0.5 V < VID < 0.9 V ? ?
VID ≤ 0.5 V RECESSIVE H
ANY Open N/A H
(1) H = high level, L = low level, X = irrelevant, ? = indeterminate.
(2) While STB is high (standby mode) the RXD output of the HVDA540 is always high (recessive) because it has no wake-up receiver.
(3) While STB is high (standby mode) the RXD output of the HVDA541 functions according to the levels above and the wake-up conditions shown in Figure 17 and Figure 18.