ZHCSQY6D august   2022  – april 2023 OPA2992-Q1 , OPA4992-Q1 , OPA992-Q1

PRODMIX  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information for Single Channel
    5. 6.5 Thermal Information for Dual Channel
    6. 6.6 Thermal Information for Quad Channel
    7. 6.7 Electrical Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Protection Circuitry
      2. 7.3.2 EMI Rejection
      3. 7.3.3 Thermal Protection
      4. 7.3.4 Capacitive Load and Stability
      5. 7.3.5 Common-Mode Voltage Range
      6. 7.3.6 Phase Reversal Protection
      7. 7.3.7 Electrical Overstress
      8. 7.3.8 Overload Recovery
      9. 7.3.9 Typical Specifications and Distributions
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Low-Side Current Measurement
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 TINA-TI (Free Software Download)
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 接收文档更新通知
    4. 9.4 支持资源
    5. 9.5 Trademarks
    6. 9.6 静电放电警告
    7. 9.7 术语表
  10. 10Mechanical, Packaging, and Orderable Information

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机械数据 (封装 | 引脚)
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订购信息

6.7 Electrical Characteristics

For VS = (V+) – (V–) = 2.7 V to 40 V (±1.35 V to ±20 V) at TA = 25°C, RL = 10 kΩ connected to VS / 2, VCM = VS / 2, and VOUT = VS / 2, unless otherwise noted.
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
OFFSET VOLTAGE
VOSInput offset voltageVCM = V–±0.21±1.03mV
TA = –40°C to 125°C±1.2
dVOS/dTInput offset voltage driftVCM = V–TA = –40°C to 125°C±0.25µV/℃
PSRR Input offset voltage versus power supply OPA992-Q1, OPA2992-Q1, VCM = V–, VS = 5 V to 40 VTA = –40°C to 125°C±0.2±1.3μV/V
OPA4992-Q1, VCM = V–, VS = 5 V to 40 V±0.4±1.8
OPA992-Q1, OPA2992-Q1, OPA4992-Q1, VCM = V–, VS = 2.7 V to 40 V(1)±0.8±7
DC channel separation0.4µV/V
INPUT BIAS CURRENT
IBInput bias current±10pA
IOSInput offset current±10pA
NOISE
ENInput voltage noisef = 0.1 Hz to 10 Hz 2.77μVPP
 0.49 µVRMS
eNInput voltage noise densityf = 1 kHz7 nV/√Hz
f = 10 kHz 4.4 
iNInput current noise densityf = 1 kHz 60 fA/√Hz
INPUT VOLTAGE RANGE
VCMCommon-mode voltage range(V–)(V+)V
CMRRCommon-mode rejection ratioVS = 40 V, V– < VCM < (V+) – 2 V (PMOS pair)TA = –40°C to 125°C100115dB
VS = 5 V, V– < VCM < (V+) – 2 V (PMOS pair)(1)7598
VS = 2.7 V, V– < VCM < (V+) – 2 V (PMOS pair)90
VS = 2.7 – 40 V, (V+) – 1 V < VCM < V+ (NMOS pair)79
(V+) – 2 V < VCM < (V+) – 1 VSee Offset Voltage vs Common-Mode Voltage (Transition Region)
INPUT IMPEDANCE
ZIDDifferential100 || 9MΩ || pF
ZICMCommon-mode6 || 1TΩ || pF
OPEN-LOOP GAIN
AOLOpen-loop voltage gainVS = 40 V, VCM = VS / 2,
(V–) + 0.1 V < VO < (V+) –  0.1 V		120142dB
VS = 40 V, VCM = VS / 2,
(V–) + 0.12 V < VO < (V+) –  0.12 V		TA = –40°C to 125°C142
VS = 5 V, VCM = VS / 2,
(V–) + 0.1 V < VO < (V+) –  0.1 V(1)		104125
TA = –40°C to 125°C125
VS = 2.7 V, VCM = VS / 2,
(V–) + 0.1 V < VO < (V+) –  0.1 V(1)		90105
TA = –40°C to 125°C105
FREQUENCY RESPONSE
GBWGain-bandwidth product10.6MHz
SRSlew rateVS = 40 V, G = +1, VSTEP = 10 V, CL = 20 pF(3)32V/μs
tSSettling timeTo 0.1%, VS = 40 V, VSTEP = 10 V, G = +1, CL = 20 pF0.65μs
To 0.1%, VS = 40 V, VSTEP = 2 V, G = +1, CL = 20 pF0.3
To 0.01%, VS = 40 V, VSTEP = 10 V, G = +1, CL = 20 pF0.86
To 0.01%, VS = 40 V, VSTEP = 2 V, G = +1, CL = 20 pF0.44
Phase marginG = +1, RL = 10 kΩ, CL = 20 pF64°
Overload recovery timeVIN  × gain > VS170ns
THD+NTotal harmonic distortion + noiseVS = 40 V, VO = 3 VRMS, G = 1, f = 1 kHz, RL = 10 kΩ0.00005%
126dB
VS = 10 V, VO = 3 VRMS, G = 1, f = 1 kHz, RL = 128 Ω0.0032%
90dB
VS = 10 V, VO = 0.4 VRMS, G = 1, f = 1 kHz, RL = 32 Ω0.00032%
110dB
OUTPUT
 Voltage output swing from railPositive and negative
rail headroom		VS = 40 V, RL = no load 7mV
VS = 40 V, RL = 10 kΩ 4860
VS = 40 V, RL = 2 kΩ 220300
VS = 2.7 V, RL = no load 0.5
VS = 2.7 V, RL = 10 kΩ 520
VS = 2.7 V, RL = 2 kΩ 2050
ISCShort-circuit current±65(2)mA
CLOADCapacitive load driveSee Phase Margin vs Capacitive LoadpF
ZOOpen-loop output impedanceIO = 0 ASee Open-Loop Output Impedance vs FrequencyΩ
POWER SUPPLY
IQQuiescent current per amplifierOPA2992-Q1, OPA4992-Q1, IO = 0 A2.42.8mA
TA = –40°C to 125°C2.84
OPA992-Q1, IO = 0 A2.482.92
TA = –40°C to 125°C2.98
(1) Specified by characterization only.
(2) At high supply voltage, placing the OPAx992-Q1 in a sudden short to mid-supply or ground leads to rapid thermal shutdown. Output current greater than ISC can be achieved if rapid thermal shutdown is avoided as per Output Voltage Swing vs Output Current.
(3) See Slew Rate vs Input Step Voltage for more information.