ZHCSOI9A July   2022  – December 2022 OPA817

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: VS = ±5 V
    6. 7.6 Typical Characteristics: VS = ±5 V
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input and ESD Protection
      2. 8.3.2 Feedback Pin
      3. 8.3.3 FET-Input Architecture with Wide Gain-Bandwidth Product
      4. 8.3.4 Device Functional Modes
        1. 8.3.4.1 Power-Down (PD) Pin
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Wideband, High-Input Impedance DAQ Front-End
    2. 9.2 Typical Applications
      1. 9.2.1 High Input Impedance, 200 MHz, Digitizer Front-End Amplifier Design
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
      4. 9.2.4 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Thermal Considerations
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 接收文档更新通知
    4. 12.4 支持资源
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 术语表
  13. 13Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

7.5 Electrical Characteristics: VS = ±5 V

At  G = 1 V/V, RF = 0, RF = 250 Ω for other gains, RL = 100 Ω, input and output referenced to mid-supply, and TA ≈ 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
AC PERFORMANCE
SSBW Small-signal bandwidth VOUT = 200 mVPP 800 MHz
VOUT = 200 mVPP, G = 2 V/V 400
VOUT = 200 mVPP, G = 5 V/V 100
VOUT = 200 mVPP, G = 10 V/V 40
GBWP Gain-bandwidth product VOUT = 200 mVPP, G = 100 V/V 400 MHz
LSBW Large-signal bandwidth VOUT = 2 VPP 250 MHz
VOUT = 4 VPP 140
Bandwidth for 0.1-dB flatness VOUT = 2 VPP 100 MHz
SR Slew rate (10% to 90%) VOUT = 4–V step 1000 V/µs
Slew rate (10% to 90%) VOUT = 1–V step, Gain = 2 V/V 750
tR, tF Rise, fall time VOUT = 200–mV step 0.7 ns
Settling time to 0.1%, VOUT = 2–V step 6 ns
Overshoot and undershoot VOUT = 2–V step 8 %
Output Overdrive recovery time VOUT = VS– to VS+, G = 2 V/V, 15 ns
HD2 Second-order harmonic distortion f = 1 MHz, VOUT = 2 VPP –110 dBc
f = 10 MHz, VOUT = 2 VPP –86
f = 50 MHz, VOUT = 2 VPP –76
f = 10 MHz, VOUT = 2 VPP, RL = 1 kΩ –97
HD3 Third-order harmonic distortion f = 1 MHz, VOUT = 2 VPP –120 dBc
f = 10 MHz, VOUT = 2 VPP –100
f = 50 MHz, VOUT = 2 VPP –68
f = 10 MHz, VOUT = 2 VPP, RL = 1 kΩ –102
eN Input voltage noise f ≥ 200 kHz 4.5 nV/√Hz
Voltage noise 1/f corner frequency 2.6 kHz
Input current noise 18 fA/√Hz
DC PERFORMANCE
AOL Open-loop voltage gain VOUT = ±1 V 78 85 dB
TA = –40°C to +85°C 72
TA = –40°C to +105°C 69
VOS Input-referred offset voltage 50 ±250 µV
TA = –40°C to +85°C ±500
TA = –40°C to +105°C ±600
Input offset voltage drift TA = –40°C to +85°C 1 ±3.5 µV/°C
TA = –40°C to +105°C 1 ±3.5
IB Input bias current 2 ±20 pA
TA = –40°C to +85°C ±1000
TA = –40°C to +105°C ±1500
IOS Input offset current 1 ±20 pA
TA = –40°C to +85°C ±500
TA = –40°C to +105°C ±750
Internal feedback trace resistance Device turned OFF, OUT to FB pin resistance 0.7 Ω
INPUT
Most positive input voltage(1) 2.1 2.7 V
TA = –40°C to +85°C 2.0
TA = –40°C to +105°C 2.0
Most negative input voltage(1) -3.9 -3.5 V
TA = –40°C to +85°C -3.4
TA = –40°C to +105°C -3.4
CMRR Common-mode rejection ratio VCM = ±0.5 V 84 110 dB
TA = –40°C to 85°C 83
TA = –40°C to 105°C 82
Input impedance common-mode 60 || 2.9 GΩ || pF
Input capacitance differential mode 0.1 pF
OUTPUT
VOL Output voltage, low no-load -3.9 -3.6 V
RL = 100 Ω -3.7 -3.4
TA = –40°C to +85°C  -3.3
TA = –40°C to +105°C -3.2
VOH Output voltage, high no-load 3.7 3.9 V
RL = 100 Ω 3.4 3.7
TA = –40°C to +85°C  3.3
TA = –40°C to +105°C, 3.2
Linear output drive (sourcing/sinking) VOUT = ±1 V, ΔVOS < 2 mV ±58 80 mA
TA = –40 to 85°C, ΔVOS < 3 mV ±40
TA = –40 to 105°C, ΔVOS < 3 mV ±35
Short-circuit current ±100 mA
ZO Closed loop output Impedance f = 100 kHz 0.04 Ω
POWER SUPPLY
IQ Quiescent current 23.5 24.5 mA
TA = –40°C to +85°C 24.7
TA = –40°C to +105°C 24.9
PSRR+ Power-supply rejection ratio ΔVS+ = ±0.5 V 80 100 dB
TA = –40°C to +85°C 77
TA = –40°C to +105°C 76
PSRR- Power-supply rejection ratio ΔVS- = ±0.5 V, 80 100 dB
TA = –40°C to +85°C 77
TA = –40°C to +105°C 76
POWER DOWN
Enable voltage threshold Specified on above (VS+) – 1 V 4 V
Disable voltage threshold Specified off below (VS+) – 3 V 2 V
Power-down quiescent current PD ≤ (VS+) – 3V 55 100 uA
Power-down pin bias current in shutdown mode PD = 0 V to (VS+) – 3 V 9 12 uA
Power-down pin bias current in active mode PD = (VS+) – 1 V to (VS+) 0.5 1 uA
Turn-on time delay Time from PD voltage exceeds threshold to VOUT = 90% of final value, VIN = 1V 0.3 µs
Turn-off time delay Time from PD  voltage reduces below threshold to IQ = 10% of active mode value 0.1 µs