11.1 Layout Guidelines

Achieving optimum performance with a high-frequency amplifier like the OPA695 requires careful attention to board layout parasitics and external component types. Recommendations that will optimize performance include:

• Minimize parasitic capacitance to any AC ground for all of the signal I/O pins. Parasitic capacitance on the output and inverting input pins can cause instability; on the non-inverting input, it can react with the source impedance to cause unintentional bandlimiting. To reduce unwanted capacitance, a window around the signal I/O pins must be opened in all of the ground and power planes around those pins. Otherwise, ground and power planes must be unbroken elsewhere on the board.
• Minimize the distance (< 0.25") from the power supply pins to high frequency 0.1-μF decoupling capacitors. At the device pins, the ground and power plane layout must not be in close proximity to the signal I/O pins. Avoid narrow power and ground traces to minimize inductance between the pins and the decoupling capacitors. The power-supply connections must always be decoupled with these capacitors. An optional supply-decoupling capacitor across the two power supplies (for bipolar operation) improves 2nd-harmonic distortion performance. Larger (2.2 μF to 6.8 μF) decoupling capacitors, effective at a lower frequency, must also be used on the main supply pins. These may be placed somewhat farther from the device, and may be shared among several devices in the same area of the PCB.
• Careful selection and placement of external components will preserve the high frequency performance of the OPA695. Resistors must be a low reactance type. Surface-mount resistors work best and allow a tighter overall layout. Metal-film and carbon composition, axially-leaded resistors can also provide good high frequency performance. Keep their leads and PCB trace length as short as possible. Never use wirewound-type resistors in a high frequency application. Because the output pin and inverting input pin are the most sensitive to parasitic capacitance, always position the feedback and series output resistor, if any, as close as possible to the output pin. Other network components, such as noninverting input termination resistors, must also be placed close to the package. Where double-side component mounting is allowed, place the feedback resistor directly under the package on the other side of the board between the output and inverting input pins. The frequency response is primarily determined by the feedback resistor value. Increasing its value reduces the bandwidth, while decreasing it gives a more peaked frequency response. The 402-Ω feedback resistor (used in the typical performance specifications at a gain of +8 on ±5-V supplies) is a good starting point for design. Note that a 523-Ω feedback resistor, rather than a direct short, is required for the unity gain follower application. A current-feedback operational amplifier requires a feedback resistor, even in the unity gain follower configuration, to control stability.
• Connections to other wideband devices on the board may be made with short direct traces or through onboard transmission lines. For short connections, consider the trace and the input to the next device as a lumped capacitive load. Relatively wide traces (50 mils to 100 mils) must be used, preferably with ground and power planes opened up around them. Estimate the total capacitive load and set R_S from the plot of Figure 40. Low parasitic capacitive loads (< 5 pF) may not need an R_S as the OPA695 is nominally compensated to operate with a 2-pF parasitic load. If a long trace is required, and the 6-dB signal loss intrinsic to a doubly-terminated transmission line is acceptable, implement a matched impedance transmission line using microstrip or stripline techniques (consult an ECL design handbook for microstrip and stripline layout techniques). A 50-Ω environment is usually not necessary on board. In fact, a higher impedance environment improves distortion, as shown in the distortion versus load plots. With a characteristic board trace impedance defined (based on board material and trace dimensions), use a matching series resistor into the trace from the output of the OPA695. Also use terminating shunt resistor at the input of the destination device. Remember that the terminating impedance will be the parallel combination of the shunt resistor and the input impedance of the destination device; this total effective impedance must be set to match the trace impedance. The high output voltage and current capability of the OPA695 allows multiple destination devices to be handled as separate transmission lines, each with their own series and shunt terminations. If the 6-dB attenuation of a doubly-terminated transmission line is unacceptable, a long trace can be series-terminated at the source end only. Treat the trace as a capacitive load in this case, and set the series resistor value as shown in the plot of Figure 40. This will not preserve signal integrity as well as a doubly-terminated line. If the input impedance of the destination device is low, there will be some signal attenuation due to the voltage divider formed by the series output into the terminating impedance.
• Socketing a high-speed part like the OPA695 is not recommended. The additional lead length and pin-to-pin capacitance introduced by the socket can create a troublesome parasitic network, which can make it almost impossible to achieve a smooth, stable frequency response. Best results are obtained by soldering the OPA695 directly onto the board.

11.1.1 Input and ESD Protection

The OPA695 is built using a very high-speed, complementary bipolar process. The internal junction breakdown voltages are relatively low for these small geometry devices. These breakdowns are reflected in the Absolute Maximum Ratings where an absolute maximum ±6.5-V supply is reported. All device pins have limited ESD protection using internal diodes to the power supplies, as shown in Figure 67.

These diodes also provide moderate protection to input overdrive voltages above the supplies. The protection diodes can typically support 30-mA continuous current. Where higher currents are possible (for example, in systems with ±15-V supply parts driving into the OPA695), current-limiting series resistors must be added into the two inputs. Keep these resistor values as low as possible as high values degrade both noise performance and frequency response.

Figure 67. Internal ESD Protection

11.2 Layout Example

As detailed in Layout Guidelines and illustrated in Figure 68, the input termination resistor, output resistor and bypass capacitors must be placed close to the amplifier. Power and ground planes are placed under the amplifier, but must be removed under the input and output pins as shown in Figure 68.

Figure 68. SBOS293 Layout