SLOS075K November   1979  – December 2025 NE5532 , NE5532A , SA5532 , SA5532A

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Operating Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Unity-Gain Bandwidth
      2. 6.3.2 Common-Mode Rejection Ratio
      3. 6.3.3 Slew Rate
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Typical Application
      1. 7.1.1 Design Requirements
      2. 7.1.2 Detailed Design Procedure
        1. 7.1.2.1 Amplifier Selection
        2. 7.1.2.2 Passive Component Selection
      3. 7.1.3 Application Curves
    2. 7.2 Power Supply Recommendations
    3. 7.3 Layout
      1. 7.3.1 Layout Guidelines
      2. 7.3.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • D|8
  • P|8
  • PS|8
散热焊盘机械数据 (封装 | 引脚)
订购信息

7.1.2 Detailed Design Procedure

The circuit in Figure 7-1 takes a single-ended input signal, VIN, and generates two output signals, VOUT+ and VOUT– using two amplifiers and a reference voltage, VREF. VOUT+ is the output of the first amplifier and is a buffered version of the input signal, VIN Equation 1. VOUT– is the output of the second amplifier which uses VREF to add an offset voltage to VIN and feedback to add inverting gain. The transfer function for VOUT– is Equation 2.

Equation 1. VOUT+ = VIN
Equation 2. NE5532 NE5532A SA5532 SA5532A

The differential output signal, VDIFF, is the difference between the two single-ended output signals, VOUT+ and VOUT–. Equation 3 shows the transfer function for VDIFF. By applying the conditions that R1 = R2 and R3 = R4, the transfer function is simplified into Equation 6. Using this configuration, the maximum input signal is equal to the reference voltage and the maximum output of each amplifier is equal to the VREF. The differential output range is 2×VREF. Furthermore, the common mode voltage is one half of VREF (see Equation 7).

Equation 3. NE5532 NE5532A SA5532 SA5532A
Equation 4. VOUT+ = VIN
Equation 5. VOUT– = VREF – VIN
Equation 6. VDIFF = 2×VIN – VREF
Equation 7. NE5532 NE5532A SA5532 SA5532A