SLVSIQ9 February 2026 MSPM0G1218
ADVANCE INFORMATION
The following table summarizes the features of each device that is described in this data sheet.
|
FLASH / SRAM (KB) |
QUAL(2) |
CAN |
UART/I2C/SPI | ADC / CHAN | COMP | GPIO |
PACKAGE(3) |
|
|---|---|---|---|---|---|---|---|---|
|
MSPM0G3218SPMR |
256 / 32 |
S |
1 | 4 / 2 / 2 | 2 / 27 | 2 | 60 |
64 LQFP |
|
MSPM0G3207SPMR |
128 / 32 |
S |
1 | 4 / 2 / 2 | 1 / 13 | 1 | 60 | |
|
MSPM0G1218SPMR |
256 / 32 |
S |
0 | 4 / 2 / 2 | 2 / 27 | 2 | 60 | |
|
MSPM0G1207SPMR |
128 / 32 |
S |
0 | 4 / 2 / 2 | 1 / 13 | 1 | 60 | |
|
MSPM0G3218SPTR |
256 / 128 |
S |
1 |
4 / 2 / 2 | 2 / 21 | 2 | 44 |
48 LQFP |
|
MSPM0G3207SPTR |
128 / 32 |
S |
1 |
4 / 2 / 2 | 1 / 12 | 1 | 44 | |
|
MSPM0G1218SPTR |
256 / 32 |
S |
0 |
4 / 2 / 2 | 2 / 21 | 2 | 44 | |
|
MSPM0G1207SPTR |
128 / 32 |
S |
0 |
4 / 2 / 2 | 1 / 12 | 1 | 44 | |
|
MSPM0G3218SRGZR |
256 / 32 |
S |
1 |
4 / 2 / 2 | 2 / 21 | 2 | 44 |
48 VQFN |
|
MSPM0G3207SRGZR |
128 / 32 |
S |
1 |
4 / 2 / 2 | 1 / 12 | 1 | 44 | |
|
MSPM0G1218SRGZR |
256 / 32 |
S |
0 |
4 / 2 / 2 | 2 / 21 | 2 | 44 | |
|
MSPM0G1207SRGZR |
128 / 32 |
S |
0 |
4 / 2 / 2 | 1 / 12 | 1 | 44 | |
|
MSPM0G3218SRHBR |
256 / 32 |
S |
1 |
4 / 2 / 2 | 2 / 16 | 2 | 28 |
32 VQFN |
|
MSPM0G3207SRHBR |
128 / 32 |
S |
1 |
4 / 2 / 2 | 1 / 10 | 1 | 28 | |
|
MSPM0G1218SRHBR |
256 / 32 |
S |
0 |
4 / 2 / 2 | 2 / 16 | 2 | 28 | |
|
MSPM0G1207SRHBR |
128 / 32 |
S |
0 |
4 / 2 / 2 | 1 / 10 | 1 | 28 | |
| MSPM0G1218SRUYR |
256 / 32 |
S | 0 | 4 / 2 / 2 | 2 / 14 | 2 | 24 |
28 WQFN |
| MSPM0G1207SRUYR | 128 / 32 | S | 0 | 4 / 2 / 2 | 1 / 8 | 1 | 24 | |
| MSPM0G1218S28DGSR |
256 / 32 |
S | 0 | 4 / 2 / 2 | 2 / 10 | 2 | 24 | 28 VSSOP (0.5mm pitch) [7.1mm x 3.0mm] |
| MSPM0G1207S28DGSR | 128 / 32 | S | 0 | 4 / 2 / 2 | 1 / 7 | 1 | 24 | |
| MSPM0G3218SRGER |
256 / 32 |
S | 1 | 4 / 2 / 2 | 2 / 11 | 2 | 20 | 24 VQFN (0.5mm pitch) [4mm x 4mm] |
| MSPM0G3207SRGER | 128 / 32 | S | 1 | 4 / 2 / 2 | 1 / 6 | 1 | 20 | |
| MSPM0G1218SRGER |
256 / 32 |
S | 0 | 4 / 2 / 2 | 2 / 11 | 2 | 20 |