SNVS179F February   2003  – September 2015 LP3995

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Input Test Signals
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Enable (EN)
      2. 8.3.2 Fast Turnoff
      3. 8.3.3 Low Output Noise
      4. 8.3.4 Output Capacitor
      5. 8.3.5 Thermal Overload Protection (TSD)
    4. 8.4 Device Functional Modes
      1. 8.4.1 Enable Operation
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 External Capacitors
        2. 9.2.2.2 Input Capacitor
        3. 9.2.2.3 Output Capacitor
        4. 9.2.2.4 No-Load Stability
        5. 9.2.2.5 Capacitor Characteristics
        6. 9.2.2.6 Noise Bypass Capacitor
        7. 9.2.2.7 Fast Turnoff and Turnon
        8. 9.2.2.8 Power Dissipation
        9. 9.2.2.9 Estimating Junction Temperature
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Examples
    3. 11.3 DSBGA Mounting
    4. 11.4 DSBGA Light Sensitivity
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)(3)
MIN MAX UNIT
Input voltage, VIN –0.3 6.5 V
Output voltage –0.3 (VIN + 0.3 V) to 6.5 V
Enable input voltage –0.3 6.5 V
Junction temperature 150 °C
Continuous power dissipation(4) Internally limited
Storage temperature, Tstg −65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to the potential at the GND pin.
(3) If Military/Aerospace specified devices are required, contact the Texas Instruments Sales Office / Distributors for availability and specifications.
(4) In applications where high power dissipation and/or poor thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA(MAX)) is dependant on the maximum operating junction temperature (TJ(MAX-OP)), the maximum power dissipation (PD(MAX)), and the junction-to-ambient thermal resistance in the application (RθJA). This relationship is given by: TA(MAX) = TJ(MAX-OP) − (PD(MAX) × RθJA).

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Machine model ±200
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
Input voltage, VIN 2.5 6 V
Enable input voltage 0 6 V
Junction temperature −40 125 °C
Ambient temperature(1) −40 85 °C
(1) In applications where high power dissipation and/or poor thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA(MAX)) is dependant on the maximum operating junction temperature (TJ(MAX-OP)), the maximum power dissipation (PD(MAX)), and the junction-to-ambient thermal resistance in the application (RθJA). This relationship is given by: TA(MAX) = TJ(MAX-OP) − (PD(MAX) × RθJA).

6.4 Thermal Information

THERMAL METRIC(1) LP3995 UNIT
YZR (DSBGA) NGD (WSON)
5 PINS 6 PINS
RθJA(2) Junction-to-ambient thermal resistance, High-K 181.2 68.5(3) °C/W
RθJC(top) Junction-to-case (top) thermal resistance 0.8 71.8 °C/W
RθJB Junction-to-board thermal resistance 107.9 35.2 °C/W
ψJT Junction-to-top characterization parameter 0.5 1.4 °C/W
ψJB Junction-to-board characterization parameter 107.9 35.0 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A 8.1 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.
(2) Thermal resistance value RθJA is based on the EIA/JEDEC High-K printed circuit board defined by: JESD51-7 - High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages.
(3) The PCB for the NGD (WSON) package RθJA includes two (2) thermal vias under the exposed thermal pad per EIA/JEDEC JESD51-5.

6.5 Electrical Characteristics

Unless otherwise noted, VEN = 1.5 V, VIN = VOUT + 1 V, CIN = 1 µF, IOUT = 1 mA, COUT = 1 µF, CBYPASS = 0.01 µF. Typical (TYP) values and limits apply for TJ = 25°C; minimum (MIN) and maximum (MAX) apply over the full temperature range for operation, −40 to +125°C, unless otherwise specified in the Test Conditions. (1)(2)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIN Input voltage 2.5 6 V
DEVICE OUTPUT: 1.5 ≤ VOUT < 1.8V
ΔVOUT Output voltage tolerance IOUT = 1 mA, TJ = 25°C –50 50 mV
IOUT = 1 mA –75 75
Line regulation error VIN = (VOUT(NOM)+1 V) to 6V,
IOUT = 1 mA		 –3.5 3.5 µV/mA
Load regulation error, DSBGA IOUT = 1 mA to 150 mA 10 75 µV/mA
Load regulation error, WSON IOUT = 1 mA to 150 mA 70 125 µV/mA
PSRR Power supply rejection ratio(3) ƒ = 1 kHz, IOUT = 1 mA 55 dB
ƒ = 10 kHz, IOUT = 1 mA 53
DEVICE OUTPUT: 1.8 V ≤ VOUT < 2.5 V
ΔVOUT Output voltage tolerance IOUT = 1 mA, TJ = 25°C –50 50 mV
IOUT = 1 mA –75 75
Line regulation error, DSBGA VIN = (VOUT(NOM)+1 V) to 6 V,
IOUT = 1 mA		 –2.5 2.5 mV/V
Line regulation error, WSON VIN = (VOUT(NOM)+1 V) to 6 V
IOUT = 1 mA		 –3.5 3.5 mV/V
Load regulation error, DSBGA IOUT = 1 mA to 150 mA 10 75 µV/mA
Load regulation error, WSON IOUT = 1 mA to 150 mA 80 125 µV/mA
PSRR Power supply rejection ratio(3) ƒ = 1 kHz, IOUT = 1 mA 55 dB
ƒ = 10 kHz, IOUT = 1 mA 50
DEVICE OUTPUT: 2.5 V ≤ VOUT ≤ 3.3 V
ΔVOUT Output voltage tolerance IOUT = 1 mA, TJ = 25°C –2 2 % of VOUT(NOM)
IOUT = 1 mA –3 3
Line regulation error VIN = (VOUT(NOM)+1 V) to 6 V
IOUT = 1 mA		 –0.1 0.1 %/V
Load regulation error, DSBGA IOUT = 1 mA to 150 mA 0.0004 0.002 %/mA
Load regulation error, WSON IOUT = 1 mA to 150 mA 0.002 0.005 %/mA
Dropout voltage IOUT = 1 mA 0.4 2 mV
IOUT = 150 mA 60 100
PSRR Power supply rejection ratio(3) ƒ = 1 kHz, IOUT = 1 mA 60 dB
ƒ = 10 kHz, IOUT = 1 mA 50
FULL VOUT RANGE
ILOAD Load current See(3)(4) 0 µA
IQ Quiescent current VEN = 1.5 V, IOUT = 0 mA 85 150 µA
VEN = 1.5 V, IOUT = 150 mA 140 200
VEN = 0.4 V 0.003 1.5
ISC Short-circuit current limit 450 mA
EN Output noise voltage(3) BW = 10 Hz to 100 kHz,
VIN = 4.2 V, IOUT = 1 mA		 25 µVRMS
TSHUTDOWN Thermal shutdown Temperature 160 °C
Hysteresis 20
ENABLE CONTROL CHARACTERISTICS
IEN Maximum input current at EN input VEN = 0 V and VIN = 6 V 0.001 µA
VIL Low input threshold 0.4 V
VIH High input threshold 0.9 V
(1) All limits are ensured. All electrical characteristics having room-temperature limits are tested during production at TJ = 25°C or correlated using Statistical Quality Control methods. Operation over the temperature specification is specified by correlating the electrical characteristics to process and temperature variations and applying statistical process control.
(2) VOUT(NOM) is the stated output voltage option for the device.
(3) This electrical specification is ensured by design.
(4) The device maintains a stable, regulated output voltage without load.

6.6 Timing Requirements

MIN NOM MAX UNIT
tON Turnon time to 95% level (1)(2) 30 µs
tOFF Turnoff time to 5% level (1)(3) 175 µs
(1) This electrical specification is ensured by design.
(2) Time from VEN = 0.9 V to VOUT = 95% (VOUT(NOM)).
(3) Time from VEN = 0.4 V to VOUT = 5% (VOUT(NOM)).

6.7 Typical Characteristics

Unless otherwise specified, CIN = COUT = 1 µF ceramic, VIN = VOUT + 1 V, TA = 25°C, EN pin is tied to VIN.
LP3995 20034910.png
Figure 1. Output Voltage Change vs Temperature
LP3995 20034912.png
VOUT = 2.8 V
Figure 3. Ground Current vs Load Current
LP3995 20034914.png
Figure 5. Ground Current vs VIN at 125°C
LP3995 20034916.png
Figure 7. Short-Circuit Current
LP3995 20034919.png
VOUT = 2.8 V
Figure 9. Ripple Rejection
LP3995 20034921.png
VOUT = 2.8 V
Figure 11. Enable Start-Up Time
LP3995 20034923.png
VOUT = 1.8 V
Figure 13. Enable Start-Up Time
LP3995 20034925.png
VOUT = 1.8 V
Figure 15. Turnoff Time
LP3995 20034911.png
VOUT = 1.8 V
Figure 2. Ground Current vs Load Current
LP3995 20034913.png
Figure 4. Ground Current vs VIN at 25°C
LP3995 20034915.png
Figure 6. Dropout vs Load Current
LP3995 20034918.png
VOUT = 1.8 V
Figure 8. Ripple Rejection
LP3995 20034920.png
VOUT = 2.8 V
Figure 10. Enable Start-Up Time
LP3995 20034922.png
VOUT = 1.8 V
Figure 12. Enable Start-Up Time
LP3995 20034924.png
VOUT = 2.8 V
Figure 14. Turnoff Time