The LMG2610 is a highly-integrated 650-V GaN power-FET half bridge intended for use in active-clamp flyback (ACF) converters. The LMG2610 combines the half-bridge power FETs, gate drivers, low-side current-sense emulation function, high-side gate-drive level shifter, and bootstrap diode function in a 9-mm by 7-mm QFN package.

The 650-V rated GaN power FETs support the large transformer turns ratios needed to minimize the secondary-side synchronous-rectifier voltage requirements in flyback converter applications. The GaN half-bridge low output-capacitive charge reduces both the time and energy needed for ACF zero-voltage switching (ZVS) and is the key characteristic needed to create small, efficient power converters.

The GaN half-bridge consists of a 170-mΩ low-side FET and a 248-mΩ high-side FET. The asymmetric GaN half-bridge FET sizes are a good utilization of total GaN FET size for ACF operating conditions.

The LMG2610 internal gate drivers regulate the drive voltage for optimum GaN power-FET on-resistance. Internal drivers also reduce total gate inductance and GaN FET common-source inductance for improved switching performance, including common-mode transient immunity (CMTI). The low-side / high-side GaN FET turn-on slew rates can be individually programmed to one of four discrete settings for design flexibility with respect to power loss, switching-induced ringing, and EMI.

Current-sense emulation places a scaled replica of the low-side drain current on the output of the CS pin. The CS pin is terminated with a resistor to AGND to create the current-sense input signal to the external power supply controller. This CS pin resistor replaces the traditional current-sense resistor, placed in series with the low-side GaN FET source, at significant power and space savings. Furthermore, with no current-sense resistor in series with the GaN source, the low-side GaN FET thermal pad can be connected directly to the PCB power ground. This thermal pad connection both improves system thermal performance and provides additional device routing flexibility since full device current can be conducted through the thermal pads.

The high-side gate-drive level-shifter reduces the capacitive coupling of the sensitive high-side gate drive path for lower noise susceptibility and better CMTI compared to external solutions where the signal path has a much larger PCB footprint. The level shifter also has minimal impact on device quiescent current and no impact on device start-up time compared to external solutions with worse quiescent current and start up performance.

The bootstrap diode function between AUX and BST is implemented with a smart-switched GaN bootstrap FET. The switched GaN bootstrap FET allows more complete charging of the BST-to-SW capacitor since the on-state GaN bootstrap FET does not have the forward voltage drop of a traditional bootstrap diode. The smart-switched GaN bootstrap FET also avoids the traditional bootstrap diode problem of BST-to-SW capacitor overcharging due to off-state third-quadrant current flow in the low-side half-bridge GaN power FET. Finally, the bootstrap function has more efficient switching due to low capacitance and no reverse-recovery charge compared to the traditional bootstrap diode.

The AUX input supply wide voltage range is compatible with the corresponding wide range supply rail created by power supply controllers. The BST input supply range is even wider on the low end to account for capacitive droop in between bootstrap recharge cycles. Low AUX / BST idle quiescent currents and fast BST start-up time support converter burst-mode operation critical for meeting government light-load efficiency mandates. Further AUX quiescent current reduction is obtained by placing the device in standby mode with the EN pin.

The INL, INH, and EN control pins have high input impedance, low input threshold voltage and maximum input voltage equal to the AUX voltage. This allows the pins to support both low voltage and high voltage input signals and be driven with low-power outputs.

The LMG2610 protection features are low-side / high-side under-voltage lockout (UVLO), low-side / high-side input gate-drive interlock, low-side / high-side cycle-by-cycle current limit, and over-temperature shut down. The UVLO features also help achieve well-behaved converter operation. The over-temperature shut down is reported on the open drain FLT output.