SLUSFF6
April 2025
LMG1020-Q1
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Switching Characteristics
5.7
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Input Stage
6.3.2
Output Stage
6.3.3
VDD and Undervoltage Lockout
6.3.4
Overtemperature Protection (OTP)
6.4
Device Functional Modes
7
Application and Implementation
7.1
Application Information
7.2
Typical Application
7.2.1
Design Requirements
7.2.2
Detailed Design Procedure
7.2.2.1
Handling Ground Bounce
7.2.2.2
Creating Nanosecond Pulse With LMG1020-Q1
7.2.3
VDD and Overshoot
7.2.4
Operating at Higher Frequency
7.2.5
Application Curves
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.1.1
Gate Drive Loop Inductance and Ground Connection
7.4.1.2
Bypass Capacitor
7.4.2
Layout Example
8
Device and Documentation Support
8.1
Third-Party Products Disclaimer
8.2
Documentation Support
8.2.1
Related Documentation
8.3
Receiving Notification of Documentation Updates
8.4
Support Resources
8.5
Trademarks
8.6
Electrostatic Discharge Caution
8.7
Glossary
9
Revision History
10
Mechanical, Packaging, and Orderable Information
封装选项
请参考 PDF 数据表获取器件具体的封装图。
机械数据 (封装 | 引脚)
YBV|6
散热焊盘机械数据 (封装 | 引脚)
订购信息
slusff6_oa
slusff6_pm
1
Features
Qualified for automotive applications
AEC-Q100 qualified
Device temperature grade 1
Low-side, ultra-fast gate driver for GaN and silicon FETs
1ns minimum input pulse width
Up to 60MHz operation
2.5ns typical, 4.5ns maximum propagation delay
400ps typical rise and fall time
7A peak source and 5A peak sink currents
5V supply voltage
UVLO and overtemperature protection
0.8mm × 1.2mm WCSP package