ZHCSLY9A October   2020  – December 2020 LM7310

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8.     14
    9. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Reverse Polarity Protection
      2. 7.3.2 Undervoltage Protection (UVLO & UVP)
      3. 7.3.3 Overvoltage Lockout (OVLO)
      4. 7.3.4 Inrush Current control and Fast-trip
        1. 7.3.4.1 Slew Rate (dVdt) and Inrush Current Control
        2. 7.3.4.2 Fast-Trip During Steady State
      5. 7.3.5 Analog Load Current Monitor Output
      6. 7.3.6 Reverse Current Protection
      7. 7.3.7 Overtemperature Protection (OTP)
      8. 7.3.8 Fault Response
      9. 7.3.9 Power Good Indication (PG)
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Single Device, Self-Controlled
      1. 8.2.1 Typical Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Setting Undervoltage and Overvoltage Thresholds
          2. 8.2.1.2.2 Setting Output Voltage Rise Time (tR)
          3. 8.2.1.2.3 Setting Power Good Assertion Threshold
          4. 8.2.1.2.4 Setting Analog Current Monitor Voltage (IMON) Range
        3. 8.2.1.3 Application Curves
    3. 8.3 Active ORing
    4. 8.4 Priority Power MUXing
    5. 8.5 USB PD Port Protection
    6. 8.6 Parallel Operation
  9. 9 Power Supply Recommendations
    1. 9.1 Transient Protection
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 接收文档更新通知
    3. 11.3 支持资源
    4. 11.4 商标
    5. 11.5 静电放电警告
    6. 11.6 术语表
  12. 12Mechanical, Packaging, and Orderable Information

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6.5 Electrical Characteristics

(Test conditions unless otherwise noted) –40°C ≤ TJ ≤ 125°C, VIN = 12 V, VEN/UVLO = 2 V, VOVLO = 0 V, dVdT = Open, RIMON = 549 Ω, PGTH = Open, PG = Open, OUT = Open. All voltages referenced to GND.
Test Parameter Description MIN TYP MAX UNITS
INPUT SUPPLY (IN)
VUVP(R) IN supply UVP rising threshold 2.44 2.53 2.64 V
VUVP(F) IN supply UVP falling threshold 2.35 2.42 2.55 V
IQ(ON) IN supply quiescent current, VIN = 2.7 V 347 492 µA
IN supply quiescent current, VIN = 12 V 426 509 µA
IN supply quiescent current, VIN = 23 V 459 612 µA
IQ(RCB) IN supply quiescent current during RCB, VOUT > VIN  189.7 234 µA
IQ(OFF) IN supply disabled state current (VSD(F) < VEN < VUVLO(R)) 74.5 97.6 µA
ISD IN supply shutdown current (VEN < VSD(F)) 4.6 8.2 µA
IQ(OVLO) IN supply OFF state current (OVLO condition), VOUT > VIN 191 µA
IINLKG(IRPP) IN supply leakage current (VIN = –14 V, VOUT = 0 V) -3.5 µA
ON RESISTANCE (IN - OUT)
RON VIN = 12 V, IOUT = 3 A, TJ = 25 ℃ 28.4 mΩ
2.7 ≤ VIN ≤ 23 V, –40 ℃ ≤ TJ ≤ 125 ℃ 44.85 mΩ
ENABLE/UNDERVOLTAGE LOCKOUT (EN/UVLO)
VUVLO(R) EN/UVLO rising threshold 1.183 1.2 1.223 V
VUVLO(F) EN/UVLO falling threshold 1.076 1.09 1.116 V
VSD(F) EN/UVLO falling threshold for lowest shutdown current 0.45 0.74 V
IENLKG EN/UVLO leakage current –0.1 0.1 µA
OVERVOLTAGE LOCKOUT (OVLO)
VOV(R) OVLO rising threshold 1.183 1.2 1.223 V
VOV(F) OVLO falling threshold 1.076 1.09 1.116 V
IOVLKG OVLO pin leakage current, 0.5 V < VOVLO  < 1.5 V –0.1 0.1 µA
IOUTLKG(OVLO) OUT leakage current (OVLO condition), VOUT > VIN 317 µA
FIXED FAST-TRIP (OUT)
IFT Fixed fast-trip current threshold 21.9 A
OUTPUT LOAD CURRENT MONITOR (IMON)
GIMON Analog load current monitor gain (IMON : IOUT), IOUT = 0.5 A to 1 A 144 181 216 µA/A
Analog load current monitor gain (IMON : IOUT), IOUT = 1 A to 5.5 A 153 181 207 µA/A
REVERSE CURRENT BLOCKING (IN - OUT)
VFWD (VIN - VOUT) forward regulation voltage, IOUT = 10 mA 4.8 16.4 28.4 mV
VREVTH (VOUT - VIN) threshold for fast BFET turn off (enter reverse current blocking) 22.7 29.3 36.5 mV
VFWDTH (VIN - VOUT) threshold for fast BFET turn on (exit reverse current blocking) 85.9 105.8 125 mV
IREVLKG(OFF) Reverse leakage current (unpowered condition), VOUT = 12 V, VIN = 0 V 4.8 µA
IREVLKG Reverse leakage current, (VOUT - VIN) = 21.5 V 10.10 15.86 µA
IOUTLKG(RCB) OUT leakage current during RCB state while ON, (VOUT - VIN) = 1 V 247.6 322 µA
POWER GOOD INDICATION (PG)
VPGD PG pin low voltage while de-asserted, VIN < VUVP(F), VEN < VSD, IPG = 26 µA 0.67 0.9 V
PG pin low voltage while de-asserted, VIN < VUVP(F), VEN < VSD, IPG = 242 µA 0.78 1 V
PG pin low voltage while de-asserted, VIN > VUVP(R) 0.6 V
IPGLKG PG pin leakage current while asserted 0.5 2 µA
POWERGOOD THRESHOLD (PGTH)
VPGTH(R) PGTH rising threshold 1.183 1.2 1.223 V
VPGTH(F) PGTH falling threshold 1.076 1.09 1.116 V
IPGTHLKG PGTH leakage current –1 1 µA
OVERTEMPERATURE PROTECTION (OTP)
TSD Thermal shutdown rising threshold, TJ↑ 154 °C
TSDHYS Thermal shutdown hysteresis, TJ↓ 10 °C
DVDT
IdVdt dVdt pin charging current 1.15 2.34 3.66 µA