SNVS790F January   2012  – November 2015 LM5114

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Power Dissipation
          1. 9.2.1.1.1 Gate Drive
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 System Examples
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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8 Detailed Description

8.1 Overview

The LM5114 is designed to drive low-side MOSFETs in boost-type configurations or to drive secondary synchronous MOSFETs in isolated topologies. The LM5114 offers both inverting and Noninverting inputs to satisfy requirements for inverting and Noninverting gate drive in a single device type.

8.2 Functional Block Diagram

LM5114 30180403.gif

8.3 Feature Description

The LM5114 is a single low-side gate driver with 7.6-A/1.3-A peak sink/source drive current capability. Inputs of the LM5114 are TTL Logic compatible and can withstand the input voltages up to 14-V regardless of the VDD voltage. This allows inputs of the LM5114 to be connected directly to most PWM controllers. The split outputs of the LM5114 offer flexibility to adjust the turnon and turnoff speed independently by adding additional impedance in either the turnon path or the turnoff path.

The LM5114 includes an under-voltage lockout (UVLO) circuit. When the VDD voltage is below the UVLO threshold voltage, the IN and INB inputs are ignored, and if there is sufficient VDD voltage, the output NMOS is turned on to pull the N_OUT low. In addition, the LM5114 has an internal PNP transistor in parallel with the output NMOS. Under the UVLO condition, the PNP transistor will be on and clamp the N_OUT voltage below
1 V.

Under the UVLO condition, the PNP transistor will be on and clamp the N_OUT voltage below 1 V. This feature ensures the N_OUT remaining low when VDD voltage is not sufficient to enhance the output NMOS. The LM5114 has the features necessary to drive low-side enhancement mode GaN FETs. Due to the fast switching speed and relatively low gate voltage of enhancement mode GaN FETs, PCB layout is crucial to achieve reliable operation. Refer to Layout for details.

8.4 Device Functional Modes

Table 1. Truth Table

IN INB P_OUT N_OUT
L L OPEN L
L H OPEN L
H L H OPEN
H H OPEN L