ZHCSNB1 February   2021 INA183

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Single-Supply Operation from IN+
      2. 8.3.2 Low Gain Error and Offset Voltage
      3. 8.3.3 Low Drift Architecture
    4. 8.4 Device Functional Modes
      1. 8.4.1 Normal Operation
      2. 8.4.2 Unidirectional, High-Side Operation
      3. 8.4.3 Input Differential Overload
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 RSENSE and Device Gain Selection
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 接收文档更新通知
    3. 12.3 支持资源
    4. 12.4 Trademarks
    5. 12.5 静电放电警告
    6. 12.6 术语表
  13. 13Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Typical Characteristics

TA = 25 °C, VS = VIN+ = 12 V (unless otherwise noted)

Figure 7-1 Input Offset Voltage Production Distribution
Figure 7-3 Common-Mode Rejection Production Distribution (A1 Devices)
Figure 7-5 Common-Mode Rejection Production Distribution (A3 Devices)
Figure 7-7 Gain Error Production Distribution (A1 Devices)
Figure 7-9 Gain Error Production Distribution (A3 Devices)
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Figure 7-11 Gain vs. Frequency
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Figure 7-13 Output Voltage Swing vs. Output Current
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Figure 7-15 Input Bias Current vs. Temperature
GUID-20210129-CA0I-SVXV-W4DC-Q6RWG9VSQGF1-low.gif
Figure 7-17 Input-Referred Voltage Noise vs. Frequency
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Figure 7-19 Step Response (10-mVPP Input Step)
Figure 7-21 Inverting Differential Input Overload
Figure 7-23 Brownout Recovery
Figure 7-2 Offset Voltage vs. Temperature
Figure 7-4 Common-Mode Rejection Production Distribution (A2 Devices)
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Figure 7-6 Common-Mode Rejection Ratio vs. Temperature
Figure 7-8 Gain Error Production Distribution (A2 Devices)
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Figure 7-10 Gain Error vs. Temperature
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Figure 7-12 Common-Mode Rejection Ratio vs. Frequency
Figure 7-14 Input Bias Current vs. Common-Mode Voltage
Figure 7-16 Quiescent Current vs. Temperature
GUID-20210129-CA0I-SG8L-T5TP-9FG73SBRG1PP-low.gif
Figure 7-18 0.1-Hz to 10-Hz Voltage Noise (Referred-to-Input)
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Figure 7-20 Common-Mode Voltage Transient Response
VDIFF = 0 V VCM = 12-V Pulse
Figure 7-22 Start-Up Response