ZHCSTC7A September   2000  – January 2024 INA114

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Application and Implementation
    1. 6.1 Application Information
      1. 6.1.1 Setting the Gain
      2. 6.1.2 Noise Performance
      3. 6.1.3 Offset Trimming
      4. 6.1.4 Input Bias Current Return Path
      5. 6.1.5 Input Common-Mode Range
      6. 6.1.6 Input Protection
      7. 6.1.7 Output Voltage Sense (SOIC-16 Package Only)
  8. 7 Typical Applications
  9. 8 Device and Documentation Support
    1. 8.1 接收文档更新通知
    2. 8.2 支持资源
    3. 8.3 Trademarks
    4. 8.4 静电放电警告
    5. 8.5 术语表
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • P|8
  • DW|16
散热焊盘机械数据 (封装 | 引脚)
订购信息

5.5 Electrical Characteristics

at TA = 25°C, VS = ±15V, RL = 2kΩ, VREF = 0V, and G = 1 (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT
VOS Offset voltage RTI INA114BP, BU ±10 + 20/G ±50 + 150/G µV
INA114AP, AU ±25 + 30/G ±125 + 500/G
Offset voltage drift TA = –40°C to +85°C, RTI INA114BP, BU ±0.1 + 0.5/G ±0.3 + 5/G µV/℃
INA114AP, AU ±0.25 + 5/G ±1 + 10/G
Long-term stability  ±0.2 + 0.5/G µV/mo
Differential impedance 100 || 6 GΩ || pF
Common-mode impedance 100 || 6 GΩ || pF
Operating input voltage (V–) + 4 (V+) – 4 V
PSRR Power-supply rejection ratio RTI, ±2.25V to ±18V 0.5 + 2/G 3 + 10/G µV/V
CMRR Common-mode rejection ratio At dc to 60Hz, RTI,
VCM = ±10V, 
ΔRS = 1kΩ		 G = 1 INA114BP, BU 80 96 dB
INA114AP, AU 75 90 dB
G = 10 INA114BP, BU 96 115
INA114AP, AU 90 106
G = 100 INA114BP, BU 110 120
INA114AP, AU 106 110
G = 1000 INA114BP, BU 115 120
INA114AP, AU 106 110
BIAS CURRENT
IB Input bias current VCM = VS / 2 INA114BP, BU ±0.5 ±2 nA
INA114AP, AU ±0.5 ±5
Input bias current drift TA = –40°C to +85°C INA114BP, BU ±8 pA/℃
INA114AP, AU ±8
IOS Input offset current VCM = VS / 2 INA114BP, BU ±0.5 ±2 nA
INA114AP, AU ±0.5 ±5
Input offset current drift TA = –40°C to +85°C INA114BP, BU ±8 pA/℃
INA114AP, AU ±8
NOISE VOLTAGE
Voltage noise G = 1000, RS = 0Ω f = 10Hz 15 nV/√Hz
f = 100Hz 11
f = 1kHz 11
fB = 0.1Hz to 10Hz 0.4 µVPP
Noise current f = 10Hz 0.4 pA/√Hz
f = 1kHz 0.2 pA/√Hz
fB = 0.1Hz to 10Hz 18 pAPP
GAIN
G Gain equation 1 + (50kΩ / RG) V/V
Range of gain 1 10000 V/V
GE Gain error VO = ±10V, G = 1 ±0.01 ±0.05 %
VO = ±10V G = 10 INA114BP, BU ±0.02 ±0.4
INA114AP, AU ±0.02 ±0.5
G = 100 INA114BP, BU ±0.05 ±0.5
INA114AP, AU ±0.05 ±0.7
G = 1000 INA114BP, BU ±0.5 ±1
INA114AP, AU ±0.5 ±2
Gain drift ±2 ±10 ppm/°C
RS = 50kΩ(1) ±25 ±100
Gain nonlinearity VO = –10V to +10V G = 1 INA114BP, BU ±0.0001 ±0.001 % of FSR
INA114AP, AU ±0.0001 ±0.002
G = 10, 100 INA114BP, BU ±0.0005 ±0.002
INA114AP, AU ±0.0005 ±0.004
G = 1000 INA114BP, BU ±0.002 ±0.01
INA114AP, AU ±0.002 ±0.02
OUTPUT
Output voltage IO = 5mA, TA = –40°C to 85°C (V–) +1.5 (V+) –1.5 V
VS = ±11.4V (V–) + 1.4 (V+) – 1.4
VS = ±2.25V (V–) +1 (V+) – 1
Load capacitance stability 1000 pF
ISC Short-circuit current Continuous to VS / 2 +20 / –15 mA
FREQUENCY RESPONSE
BW Bandwidth, –3dB G = 1 1 MHz
G = 10 100 kHz
G = 100 10
G = 1000 1
SR Slew rate G = 10, VO = ±10V 0.3 0.6 V/µs
tS Settling time 0.01%, VSTEP = 10V G = 1 18 µs
G = 10 20
G = 100 120
G = 1000 1100
Overload recovery 50% overdrive 20 µs
POWER SUPPLY
IQ Quiescent current VS = ±2.25V to ±18V, VIN = 0V ±2.2 ±3 mA
(1) Temperature coefficient of the "50kΩ" term in the gain equation.