ZHCSGB3A June   2017  – August 2018 ESD122

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
    1.     USB Type-C 应用示例
      1.      Device Images
  4. 修订历史记录
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings—JEDEC Specification
    3. 6.3 ESD Ratings—IEC Specification
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  IEC 61000-4-2 ESD Protection
      2. 7.3.2  IEC 61000-4-4 EFT Protection
      3. 7.3.3  IEC 61000-4-5 Surge Protection
      4. 7.3.4  IO Capacitance
      5. 7.3.5  DC Breakdown Voltage
      6. 7.3.6  Ultra Low Leakage Current
      7. 7.3.7  Low ESD Clamping Voltage
      8. 7.3.8  Supports High Speed Interfaces
      9. 7.3.9  Industrial Temperature Range
      10. 7.3.10 Easy Flow-Through Routing Package
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 USB 3.1 Gen 2 Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Signal Range
          2. 8.2.1.2.2 Operating Frequency
        3. 8.2.1.3 Application Curves
      2. 8.2.2 HDMI 2.0 Application
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Signal Range
          2. 8.2.2.2.2 Operating Frequency
        3. 8.2.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11器件和文档支持
    1. 11.1 文档支持
      1. 11.1.1 相关文档
    2. 11.2 接收文档更新通知
    3. 11.3 社区资源
    4. 11.4 商标
    5. 11.5 静电放电警告
    6. 11.6 术语表
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Typical Characteristics

ESD122 D002_SLVSDP5.gif
Figure 1. Positive TLP Curve, IO Pin to GND
ESD122 D004_SLVSDP5.gif
Figure 3. 8-kV IEC 61000-4-2 Waveform, IO Pin to GND
ESD122 D006_SLVSDP5.gif
Figure 5. IEC 61000-4-5 Surge Curve (tp = 8/20µs), IO Pin to GND
ESD122 D001_SLVSDP5.gif
Figure 7. DC Voltage Sweep I-V Curve, IO Pin to GND
ESD122 D010_SLVSDP5.gif
Figure 9. Insertion Loss
ESD122 D012_SLVSDP5.gif
Figure 11. DC Voltage Sweep I-V Curve, IO Pin to GND,
Pre and Post 10,000 Repetitive ESD Strikes per IEC 61000-4-2 Level 4 (Contact)
ESD122 D003_SLVSDP5.gif
Figure 2. Negative TLP Curve, IO Pin to GND (Plotted as Positive TLP Curve GND to IO)
ESD122 D005_SLVSDP5.gif
Figure 4. –8-kV IEC 61000-4-2 Waveform, IO Pin to GND
ESD122 D008_SLVSDP5.gif
Figure 6. Capacitance vs Bias Voltage at Multiple Temperatures, IO Pin to GND
ESD122 D009_SLVSDP5.gif
Figure 8. Leakage Current vs Temperature, IO Pin to GND, at 2.5 V Bias
ESD122 D011_SLVSDP5.gif
Figure 10. Capacitance vs Frequency