ZHCSPH2 January   2022 DRV8251A

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Device Comparison
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
    7. 7.7 Timing Diagrams
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 External Components
    4. 8.4 Feature Description
      1. 8.4.1 Bridge Control
      2. 8.4.2 Current Sense and Regulation (IPROPI)
        1. 8.4.2.1 Current Sensing
        2. 8.4.2.2 Current Regulation
      3. 8.4.3 Protection Circuits
        1. 8.4.3.1 Overcurrent Protection (OCP)
        2. 8.4.3.2 Thermal Shutdown (TSD)
        3. 8.4.3.3 VM Undervoltage Lockout (UVLO)
    5. 8.5 Device Functional Modes
      1. 8.5.1 Active Mode
      2. 8.5.2 Low-Power Sleep Mode
      3. 8.5.3 Fault Mode
    6. 8.6 Pin Diagrams
      1. 8.6.1 Logic-Level Inputs
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Brush DC Motor
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Motor Voltage
          2. 9.2.1.2.2 Motor Current
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Stall Detection
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1 Stall Detection Timing
          2. 9.2.2.2.2 Stall Threshold Selection
        3. 9.2.2.3 Application Curves
      3. 9.2.3 Relay Driving
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
          1. 9.2.3.2.1 Control Interface for Single-Coil Relays
          2. 9.2.3.2.2 Control Interface for Dual-Coil Relays
        3. 9.2.3.3 Application Curves
      4. 9.2.4 Multi-Sourcing with Standard Motor Driver Pinout
    3. 9.3 Current Capability and Thermal Performance
      1. 9.3.1 Power Dissipation and Output Current Capability
      2. 9.3.2 Thermal Performance
        1. 9.3.2.1 Steady-State Thermal Performance
        2. 9.3.2.2 Transient Thermal Performance
  10. 10Power Supply Recommendations
    1. 10.1 Bulk Capacitance
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
  13. 13Mechanical, Packaging, and Orderable Information

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7.5 Electrical Characteristics

4.5 V ≤ VVM ≤ 48 V, –40°C ≤ TJ ≤ 150°C (unless otherwise noted). Typical values are at TJ = 25 °C and VVM = 24 V.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER SUPPLY (VM)
IVMQ VM sleep mode current VVM = 24 V, IN1 = IN2 = 0, TJ = 25°C 1 µA
IVM VM active mode current VVM = 24 V, IN1 = IN2 = 1 3 4 mA
tWAKE Turnon time Control signal to active mode 250 µs
tSLEEP Turnoff time Control signal to sleep mode 0.8 1.5 ms
LOGIC-LEVEL INPUTS (INx)
VIL Input logic low voltage 0.5 V
VIH Input logic high voltage 1.5 V
VHYS Input hysteresis 200 mV
IIL Input logic low current VIN = 0 V -1 1 µA
IIH Input logic high current VIN = 3.3 V 33 100 µA
RPD Input pulldown resistance To GND 100 kΩ
DRIVER OUTPUTS (OUTx)
RDS(on)_HS High-side MOSFET on resistance VVM = 24 V, I = 1 A, fPWM = 25 kHz 225 mΩ
RDS(on)_LS Low-side MOSFET on resistance VVM = 24 V, I = 1 A, fPWM = 25 kHz 225 mΩ
VSD Body diode forward voltage IOUT = 1 A 0.8 V
tRISE Output rise time VVM = 24 V, OUTx rising from 10% to 90% 220 ns
tFALL Output fall time VVM = 24 V, OUTx falling from 90% to 10% 220 ns
tPD Input to output propagation delay INx to OUTx 0.7 1 µs
tDEAD Output dead time 200 ns
INTEGRATED CURRENT SENSE AND REGULATION (IPROPI, VREF)
AIPROPI Current mirror scaling factor 1575 µA/A
AERR Current mirror total error IOUT = 1.5 A, VVM ≥ 6.5 V, VIPROPI ≤ 3.0 V -5 5 %
tOFF Current regulation off time 25 µs
tBLK Current regulation blanking time 1.4 µs
tDELAY Current sense delay time 1.1 µs
tDEG Current regulation deglitch time 0.7 µs
PROTECTION CIRCUITS
VUVLO Supply undervoltage lockout (UVLO) Supply rising 4.15 4.3 4.45 V
Supply falling 4.05 4.2 4.35 V
VUVLO_HYS Supply UVLO hysteresis Rising to falling threshold 100 mV
tUVLO Supply undervoltage deglitch time 10 µs
IOCP Overcurrent protection trip point 4.5 ≤ VVM < 5.5 V 3.7 A
VVM ≥ 5.5 V 4.1 A
tOCP Overcurrent protection deglitch time 1.5 µs
tRETRY Overcurrent protection retry time 3 ms
TTSD Thermal shutdown temperature 150 175 °C
THYS Thermal shutdown hysteresis 40 °C