ZHCSCU2D
February 2014 – June 2019
DLPC3433
,
DLPC3438
PRODUCTION DATA.
1
特性
2
应用
3
说明
典型的独立系统
Device Images
4
修订历史记录
5
Pin Configuration and Functions
Pin Functions – Board Level Test, Debug, and Initialization
Pin Functions – Parallel Port Input Data and Control
Pin Functions - DSI Input Data and Clock
Pin Functions – DMD Reset and Bias Control
Pin Functions – DMD Sub-LVDS Interface
Pin Functions – Peripheral Interface
Pin Functions – GPIO Peripheral Interface
Pin Functions – Clock and PLL Support
Pin Functions – Power and Ground
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics over Recommended Operating Conditions
6.6
Electrical Characteristics
6.7
High-Speed Sub-LVDS Electrical Characteristics
6.8
Low-Speed SDR Electrical Characteristics
6.9
System Oscillators Timing Requirements
6.10
Power-Up and Reset Timing Requirements
6.11
Parallel Interface Frame Timing Requirements
6.12
Parallel Interface General Timing Requirements
6.13
BT656 Interface General Timing Requirements
6.14
DSI Host Timing Requirements
6.15
Flash Interface Timing Requirements
7
Parameter Measurement Information
7.1
HOST_IRQ Usage Model
7.2
Input Source
7.2.1
Input Source - Frame Rates and 3-D Display Orientation
7.2.2
Parallel Interface Supports Six Data Transfer Formats
7.2.2.1
PDATA Bus – Parallel Interface Bit Mapping Modes
7.2.3
DSI Interface - Supported Data Transfer Formats
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Interface Timing Requirements
8.3.1.1
Parallel Interface
8.3.2
Display Serial Interface DSI
8.3.3
Serial Flash Interface
8.3.4
Serial Flash Programming
8.3.5
SPI Signal Routing
8.3.6
I2C Interface Performance
8.3.7
Content-Adaptive Illumination Control
8.3.8
Local Area Brightness Boost
8.3.9
3-D Glasses Operation
8.3.10
DMD (Sub-LVDS) Interface
8.3.11
Calibration and Debug Support
8.3.12
DMD Interface Considerations
9
Device Functional Modes
10
Application and Implementation
10.1
Application Information
10.1.1
DLPC343x System Design Consideration
10.2
Typical Application
10.2.1
Design Requirements
10.2.2
Detailed Design Procedure
10.2.3
Application Curve
11
Power Supply Recommendations
11.1
System Power-Up and Power-Down Sequence
11.2
DLPC343x Power-Up Initialization Sequence
11.3
DMD Fast PARK Control (PARKZ)
11.4
Hot Plug Usage
11.5
Maximum Signal Transition Time
12
Layout
12.1
Layout Guidelines
12.1.1
PCB Layout Guidelines for Internal ASIC PLL Power
12.1.2
DLPC343x Reference Clock
12.1.2.1
Recommended Crystal Oscillator Configuration
12.1.2.1.1
PCB Layout Guidelines for DSI Interface
12.1.3
General PCB Recommendations
12.1.4
General Handling Guidelines for Unused CMOS-Type Pins
12.1.5
Maximum Pin-to-Pin, PCB Interconnects Etch Lengths
12.1.6
Number of Layer Changes
12.1.7
Stubs
12.1.8
Terminations
12.1.9
Routing Vias
12.2
Layout Example
12.3
Thermal Considerations
13
器件和文档支持
13.1
器件支持
13.1.1
第三方产品免责声明
13.1.2
器件命名规则
13.1.2.1
器件标记
13.1.3
视频时序参数定义
13.2
相关链接
13.3
社区资源
13.4
商标
13.5
静电放电警告
13.6
Glossary
14
机械、封装和可订购信息
14.1
Package Option Addendum
14.1.1
Packaging Information
封装选项
机械数据 (封装 | 引脚)
ZEZ|201
MPBGAK7
散热焊盘机械数据 (封装 | 引脚)