ZHCSCU2D February   2014  – June 2019 DLPC3433 , DLPC3438

PRODUCTION DATA.  

1. 1 特性
2. 2 应用
3. 3 说明
   1.     典型的独立系统
      1.      Device Images
4. 4 修订历史记录
5. 5 Pin Configuration and Functions
   1.     Pin Functions – Board Level Test, Debug, and Initialization
   2.     Pin Functions – Parallel Port Input Data and Control
   3.     Pin Functions - DSI Input Data and Clock
   4.     Pin Functions – DMD Reset and Bias Control
   5.     Pin Functions – DMD Sub-LVDS Interface
   6.     Pin Functions – Peripheral Interface
   7.     Pin Functions – GPIO Peripheral Interface
   8.     Pin Functions – Clock and PLL Support
   9.     Pin Functions – Power and Ground
6. 6 Specifications
   1. 6.1  Absolute Maximum Ratings
   2. 6.2  ESD Ratings
   3. 6.3  Recommended Operating Conditions
   4. 6.4  Thermal Information
   5. 6.5  Electrical Characteristics over Recommended Operating Conditions
   6. 6.6  Electrical Characteristics
   7. 6.7  High-Speed Sub-LVDS Electrical Characteristics
   8. 6.8  Low-Speed SDR Electrical Characteristics
   9. 6.9  System Oscillators Timing Requirements
   10. 6.10 Power-Up and Reset Timing Requirements
   11. 6.11 Parallel Interface Frame Timing Requirements
   12. 6.12 Parallel Interface General Timing Requirements
   13. 6.13 BT656 Interface General Timing Requirements
   14. 6.14 DSI Host Timing Requirements
   15. 6.15 Flash Interface Timing Requirements
7. 7 Parameter Measurement Information
   1. 7.1 HOST_IRQ Usage Model
   2. 7.2 Input Source
      1. 7.2.1 Input Source - Frame Rates and 3-D Display Orientation
      2. 7.2.2 Parallel Interface Supports Six Data Transfer Formats
         1. 7.2.2.1 PDATA Bus – Parallel Interface Bit Mapping Modes
      3. 7.2.3 DSI Interface - Supported Data Transfer Formats
8. 8 Detailed Description
   1. 8.1 Overview
   2. 8.2 Functional Block Diagram
   3. 8.3 Feature Description
      1. 8.3.1  Interface Timing Requirements
         1. 8.3.1.1 Parallel Interface
      2. 8.3.2  Display Serial Interface DSI
      3. 8.3.3  Serial Flash Interface
      4. 8.3.4  Serial Flash Programming
      5. 8.3.5  SPI Signal Routing
      6. 8.3.6  I2C Interface Performance
      7. 8.3.7  Content-Adaptive Illumination Control
      8. 8.3.8  Local Area Brightness Boost
      9. 8.3.9  3-D Glasses Operation
      10. 8.3.10 DMD (Sub-LVDS) Interface
      11. 8.3.11 Calibration and Debug Support
      12. 8.3.12 DMD Interface Considerations
9. 9 Device Functional Modes
10. 10Application and Implementation
    1. 10.1 Application Information
       1. 10.1.1 DLPC343x System Design Consideration
    2. 10.2 Typical Application
       1. 10.2.1 Design Requirements
       2. 10.2.2 Detailed Design Procedure
       3. 10.2.3 Application Curve
11. 11Power Supply Recommendations
    1. 11.1 System Power-Up and Power-Down Sequence
    2. 11.2 DLPC343x Power-Up Initialization Sequence
    3. 11.3 DMD Fast PARK Control (PARKZ)
    4. 11.4 Hot Plug Usage
    5. 11.5 Maximum Signal Transition Time
12. 12Layout
    1. 12.1 Layout Guidelines
       1. 12.1.1 PCB Layout Guidelines for Internal ASIC PLL Power
       2. 12.1.2 DLPC343x Reference Clock
          1. 12.1.2.1 Recommended Crystal Oscillator Configuration
             1. 12.1.2.1.1 PCB Layout Guidelines for DSI Interface
       3. 12.1.3 General PCB Recommendations
       4. 12.1.4 General Handling Guidelines for Unused CMOS-Type Pins
       5. 12.1.5 Maximum Pin-to-Pin, PCB Interconnects Etch Lengths
       6. 12.1.6 Number of Layer Changes
       7. 12.1.7 Stubs
       8. 12.1.8 Terminations
       9. 12.1.9 Routing Vias
    2. 12.2 Layout Example
    3. 12.3 Thermal Considerations
13. 13器件和文档支持
    1. 13.1 器件支持
       1. 13.1.1 第三方产品免责声明
       2. 13.1.2 器件命名规则
          1. 13.1.2.1 器件标记
       3. 13.1.3 视频时序参数定义
    2. 13.2 相关链接
    3. 13.3 社区资源
    4. 13.4 商标
    5. 13.5 静电放电警告
    6. 13.6 Glossary
14. 14机械、封装和可订购信息
    1. 14.1 Package Option Addendum
       1. 14.1.1 Packaging Information