ZHCSD19A September   2014  – October 2015 DLP9000

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  Storage Conditions
    3. 7.3  ESD Ratings
    4. 7.4  Recommended Operating Conditions
    5. 7.5  Thermal Information
    6. 7.6  Electrical Characteristics
    7. 7.7  Timing Requirements
    8. 7.8  Capacitance at Recommended Operating Conditions
    9. 7.9  Typical Characteristics
    10. 7.10 System Mounting Interface Loads
    11. 7.11 Micromirror Array Physical Characteristics
    12. 7.12 Micromirror Array Optical Characteristics
    13. 7.13 Optical and System Image Quality
    14. 7.14 Window Characteristics
    15. 7.15 Chipset Component Usage Specification
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
      1. 9.4.1 DLP9000FLS
      2. 9.4.2 DLP9000XFLS
    5. 9.5 Window Characteristics and Optics
      1. 9.5.1 Optical Interface and System Image Quality
      2. 9.5.2 Numerical Aperture and Stray Light Control
      3. 9.5.3 Pupil Match
      4. 9.5.4 Illumination Overfill
    6. 9.6 Micromirror Array Temperature Calculation
    7. 9.7 Micromirror Landed-On/Landed-Off Duty Cycle
      1. 9.7.1 Definition of Micromirror Landed-On/Landed-Off Duty Cycle
      2. 9.7.2 Landed Duty Cycle and Useful Life of the DMD
      3. 9.7.3 Landed Duty Cycle and Operational DMD Temperature
      4. 9.7.4 Estimating the Long-Term Average Landed Duty Cycle of a Product or Application
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Typical Application using DLP9000FLS
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
      2. 10.2.2 Typical Application using DLP9000XFLS
  11. 11Power Supply Recommendations
    1. 11.1 DMD Power Supply Requirements
    2. 11.2 DMD Power Supply Power-Up Procedure
    3. 11.3 DMD Power Supply Power-Down Procedure
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 General PCB Recommendations
      2. 12.1.2 Power Planes
      3. 12.1.3 LVDS Signals
      4. 12.1.4 Critical Signals
      5. 12.1.5 Flex Connector Plating
      6. 12.1.6 Device Placement
      7. 12.1.7 Device Orientation
      8. 12.1.8 Fiducials
    2. 12.2 Layout Example
      1. 12.2.1 Board Stack and Impedance Requirements
  13. 13器件和文档支持
    1. 13.1 器件支持
      1. 13.1.1 器件处理
      2. 13.1.2 器件命名规则
      3. 13.1.3 器件标记
    2. 13.2 文档支持
      1. 13.2.1 相关文档
    3. 13.3 社区资源
    4. 13.4 商标
    5. 13.5 静电放电警告
    6. 13.6 Glossary
  14. 14机械、封装和可订购信息
    1. 14.1 热特性
    2. 14.2 封装热阻
    3. 14.3 外壳温度

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

10 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

10.1 Application Information

The DLP9000FLS DMD is controlled by two DLPC900 controllers. This chipset offers two modes of operation. The first is Video mode where the video source is displayed on the DMD. The second is Pattern mode, where the patterns are pre-stored in flash memory and then streamed to the DMD. The allowed DMD pattern rate depends on which mode and bit-depth is selected.

The DLP9000XFLS DMD is controlled by the DLPC910 controller, where the DLPC910 is configured by the program content in the DLPR910. This chipset offers streaming 1-bit binary patterns to the DMD at speeds greater than 61 Gigabits per second (Gbps). The patterns are streamed from an customer designed processor into the DLPC910 LVDS input data interface.

Both the DLP9000FLS and the DLP9000XFLS provide solutions for many varied applications including structured light, 3-D printing, video projection, and high speed lithography. The DMD is a spatial light modulator, which reflects incoming light from an illumination source to one of two directions, with the primary direction being into a projection or collection optic. Each application is derived primarily from the optical architecture of the system and the format of the data being used.

10.2 Typical Applications

10.2.1 Typical Application using DLP9000FLS

A typical embedded system application using two DLPC900 controllers and a DLP9000FLS DMD is shown in Figure 17. In this configuration, the DLPC900 controller supports a 24-bit parallel RGB input, typical of LCD interfaces, from an external source or processor. The 24-bit parallel data must be split between a left half and a right half, each half between the two controllers. The external processor must format each half to consist of 1280x1600 plus any horizontal and vertical blanking at half the pixel clock rate. This system configuration supports still and motion video as well as sequential pattern modes. For more information, refer to the DLPC900 digital controller data sheet listed under 相关文档.

DLP9000 typappsch_dual.gif Figure 17. DLP9000FLS Typical Application Schematic

10.2.1.1 Design Requirements

Detailed design requirements are located in the DLPC900 or the DLPC910 digital controller data sheets. Refer to the data sheets listed under 相关文档.

10.2.1.2 Detailed Design Procedure

Reference Design material exists for systems using either the DLP9000FLS or the DLP9000XFLS DMD with their respective Controllers. This reference material includes reference board schematics, PCB layouts, and Bills of Materials. Layout guidelines for boards utilizing these controllers and DMDs can be found in the respective DLPC900 or DLPC910 Controller data sheets. For more information, please refer to the individual controller data sheets listed under 相关文档.

10.2.2 Typical Application using DLP9000XFLS

Direct-write digital imaging is regularly used in high-end lithography printing. This mask-less technology offers a continuous run of printing by changing the digitally created patterns without stopping the imaging head. Figure 18shows a system where a DLPC910 digital controller is coupled with the DLP9000XFLS DMD. This system offers an ideal back-end imager that takes in digital images at 2560 x 1600 in resolution to achieve speeds of more than 61 Gbps. For more information, refer to the DLPC910 digital controller data sheet listed under 相关文档.

DLP9000 typ_app_hi_spd_dlps064.gif Figure 18. DLP9000XFLS Typical Application Schematic