ZHCSI68F September   2007  – October 2018 DAC5652A

PRODUCTION DATA.  

  1. 特性
  2. 应用
    1.     功能方框图
  3. 说明
  4. 修订历史记录
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: DC
    6. 6.6  Electrical Characteristics: AC
    7. 6.7  Electrical Characteristics: Digital Input
    8. 6.8  Electrical Characteristics: Power Supply
    9. 6.9  Switching Characteristics
    10. 6.10 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Digital Inputs
      2. 7.3.2 References
        1. 7.3.2.1 Internal Reference
        2. 7.3.2.2 External Reference
    4. 7.4 Device Functional Modes
      1. 7.4.1 Input Interfaces
        1. 7.4.1.1 Dual-Bus Data Interface and Timing
        2. 7.4.1.2 Single-Bus Interleaved Data Interface and Timing
      2. 7.4.2 Gain Setting Option
      3. 7.4.3 Sleep Mode
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 DAC Transfer Function
        1. 8.1.1.1 Analog Outputs
      2. 8.1.2 Output Configurations
      3. 8.1.3 Differential With Transformer
      4. 8.1.4 Single-Ended Configuration
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11器件和文档支持
    1. 11.1 文档支持
      1. 11.1.1 相关文档
    2. 11.2 接收文档更新通知
    3. 11.3 社区资源
    4. 11.4 商标
    5. 11.5 静电放电警告
    6. 11.6 术语表
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

DAC Transfer Function

Each of the DACs in the DAC5652A has a set of complementary current outputs, IOUT1 and IOUT2. The full-scale output current, IOUTFS, is the summation of the two complementary output currents:

Equation 2. DAC5652A Equ_1_las452.gif

The individual output currents depend on the DAC code and can be expressed as:

Equation 3. DAC5652A Equ_2_las452.gif
Equation 4. DAC5652A Equ_3_las452.gif

where Code is the decimal representation of the DAC data input word. Additionally, IOUTFS is a function of the reference current IREF, which is determined by the reference voltage and the external setting resistor (RSET).

Equation 5. DAC5652A Equ_4_las452.gif

In most cases, the complementary outputs drive resistive loads or a terminated transformer. A signal voltage develops at each output according to:

Equation 6. DAC5652A Equ_5_las452.gif
Equation 7. DAC5652A Equ_6_las452.gif

The value of the load resistance is limited by the output compliance specification of the DAC5652A. To maintain specified linearity performance, the voltage for IOUT1 and IOUT2 must not exceed the maximum allowable compliance range.

The total differential output voltage is:

Equation 8. DAC5652A Equ_7_las452.gif
Equation 9. DAC5652A Equ_8_las452.gif