ZHCSI68F
September 2007 – October 2018
DAC5652A
PRODUCTION DATA.
1
特性
2
应用
功能方框图
3
说明
4
修订历史记录
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics: DC
6.6
Electrical Characteristics: AC
6.7
Electrical Characteristics: Digital Input
6.8
Electrical Characteristics: Power Supply
6.9
Switching Characteristics
6.10
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Digital Inputs
7.3.2
References
7.3.2.1
Internal Reference
7.3.2.2
External Reference
7.4
Device Functional Modes
7.4.1
Input Interfaces
7.4.1.1
Dual-Bus Data Interface and Timing
7.4.1.2
Single-Bus Interleaved Data Interface and Timing
7.4.2
Gain Setting Option
7.4.3
Sleep Mode
8
Application and Implementation
8.1
Application Information
8.1.1
DAC Transfer Function
8.1.1.1
Analog Outputs
8.1.2
Output Configurations
8.1.3
Differential With Transformer
8.1.4
Single-Ended Configuration
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.3
Application Curve
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Examples
11
器件和文档支持
11.1
文档支持
11.1.1
相关文档
11.2
接收文档更新通知
11.3
社区资源
11.4
商标
11.5
静电放电警告
11.6
术语表
12
机械、封装和可订购信息
封装选项
机械数据 (封装 | 引脚)
RSL|48
MPQF193A
PFB|48
MTQF019B
散热焊盘机械数据 (封装 | 引脚)
RSL|48
QFND155N
订购信息
zhcsi68f_oa
zhcsi68f_pm
1
特性
10 位双路发送 DAC
275MSPS 更新速率
单电源:3.0V 至 3.6V
高无杂散动态范围 (SFDR):5MHz 时 80dBc
高三阶双音互调 (IMD3):15.1MHz 和 16.1MHz 时 78dBc
独立或单一电阻器增益控制
双路或交错式数据
1.2V 片上基准电压
低功耗:290mW
断电模式:9mW
封装:
48 引脚薄四方扁平封装 (TQFP)
48 引脚极薄四方扁平无引线封装 (VQFN)