ZHCSD66B January   2014  – May 2017

PRODUCTION DATA.  

  1. 特性
  2. 应用范围
  3. 说明
  4. 修订历史记录
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Undervoltage Lockout
      2. 8.3.2 Power On
      3. 8.3.3 Power-Path Management
        1. 8.3.3.1 Input Source Connected - Adapter or USB
          1. 8.3.3.1.1 Input DPM Mode, VIN-DPM
          2. 8.3.3.1.2 DPPM Mode
          3. 8.3.3.1.3 Battery Supplement Mode
        2. 8.3.3.2 Input Source Not Connected
      4. 8.3.4 Battery Charging
        1. 8.3.4.1 Charge Current Translator
        2. 8.3.4.2 Battery Detection and Recharge
        3. 8.3.4.3 Termination Disable (TD Input, bq24230H)
        4. 8.3.4.4 Adjustable Termination Threshold (ITERM Input, bq24232H)
        5. 8.3.4.5 Dynamic Charge Timers (TMR Input)
        6. 8.3.4.6 Status Indicators (PGOOD, CHG)
          1. 8.3.4.6.1 Timer Fault
        7. 8.3.4.7 Thermal Regulation and Thermal Shutdown
      5. 8.3.5 Battery Pack Temperature Monitoring
    4. 8.4 Device Functional Modes
      1. 8.4.1 Explanation of Deglitch Times and Comparator Hysteresis
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Calculations
          1. 9.2.2.1.1 Program the Fast-Charge Current (ISET):
          2. 9.2.2.1.2 Program the Input Current Limit (ILIM)
          3. 9.2.2.1.3 Program the Termination Current Threshold (ITERM)
          4. 9.2.2.1.4 Program 6.25-Hour Fast-Charge Safety Timer (TMR)
        2. 9.2.2.2 TS Function
        3. 9.2.2.3 CHG and PGOOD
        4. 9.2.2.4 Selecting IN, OUT, AND BAT Pin Capacitors
        5. 9.2.2.5 Sleep Mode
      3. 9.2.3 Application Curves
    3. 9.3 System Examples
      1. 9.3.1 Stand-Alone Charger
  10. 10Power Supply Recommendations
    1. 10.1 Requirements for OUT Output
    2. 10.2 USB Sources and Standard AC Adapters
    3. 10.3 Half-Wave Adapters
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Package
  12. 12器件和文档支持
    1. 12.1 文档支持
      1. 12.1.1 相关文档
    2. 12.2 相关链接
    3. 12.3 商标
    4. 12.4 静电放电警告
    5. 12.5 Glossary
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Detailed Description

Overview

The bq2423xH devices are integrated Li-ion linear chargers and system power-path management devices targeted at space-limited portable applications. The device powers the system while simultaneously and independently charging the battery. This feature reduces the number of charge and discharge cycles on the battery, allows for proper charge termination, and enables the system to run with a defective or absent battery pack. This feature also allows instant system turnon even with a totally discharged battery. The input power source for charging the battery and running the system can be an AC adapter or a USB port. The devices feature dynamic power-path management (DPPM), which shares the source current between the system and battery charging and automatically reduces the charging current if the system load increases. When charging from a USB port, the input dynamic power management (VIN-DPM) circuit reduces the input current limit if the input voltage falls below a threshold, thus preventing the USB port from crashing. The power-path architecture also permits the battery to supplement the system current requirements when the adapter cannot deliver the peak system currents.

Functional Block Diagram

bq24230H bq24232H fbd_lusBI8.gif

Feature Description

Undervoltage Lockout

The bq2423xH family remains in power-down mode when the input voltage at the IN pin is below the undervoltage lockout (UVLO) threshold.

During the power-down mode, the host commands at the control inputs (CE, EN1 and EN2) are ignored. The Q1 FET connected between IN and OUT pins is off, and the status outputs CHG and PGOOD are high impedance. The Q2 FET that connects BAT to OUT is ON. During power-down mode, the VOUT(SC2) circuitry is active and monitors for overload conditions on OUT.

Power On

When VIN exceeds the UVLO threshold, the bq2423xH powers up. While VIN is below VBAT + VIN(DT), the host commands at the control inputs (CE, EN1, and EN2) are ignored. The Q1 FET connected between IN and OUT pins is off, and the status outputs CHG and PGOOD are high impedance. The Q2 FET that connects BAT to OUT is ON. During this mode, the VOUT(SC2) circuitry is active and monitors for overload conditions on OUT.

When VIN rises above VBAT + VIN(DT), PGOOD is low to indicate that the valid power status and the CE, EN1, and EN2 inputs are read. The device enters standby mode whenever (EN1, EN2) = (1, 1) or if an input overvoltage condition occurs. In standby mode, Q1 is OFF and Q2 is ON. (If SYSOFF is high, FET Q2 is off). During standby mode, the VOUT(SC2) circuitry is active and monitors for overload conditions on OUT.

When the input voltage at IN is within the valid range: VIN > UVLO AND VIN > VBAT + VIN(DT) AND VIN < VOVP, and the EN1 and EN2 pins indicate that the USB suspend mode is not enabled [(EN1, EN2) ≠ (HI, HI)], all internal timers and other circuit blocks are activated. The device checks for short circuits at the ISET and ILIM pins. If no short conditions exists, the device switches on the input FET Q1 with a 100-mA current limit to check for a short circuit at OUT. If VOUT rises above VSC, the FET Q1 switches to the current-limit threshold set by EN1, EN2, and RILIM and the device enters normal operation where the system is powered by the input source (Q1 is on), and the device continuously monitors the status of CE, EN1, and EN2 as well as the input voltage conditions.

bq24230H bq24232H start_flow_lus821.gif Figure 11. Start-up Flow Diagram

Power-Path Management

The bq2423xH features an OUT output that powers the external load connected to the battery. This output is active whenever a source is connected to IN or BAT. The following sections discuss the behavior of OUT with a source connected to IN to charge the battery and a battery source only.

Input Source Connected – Adapter or USB

With a source connected, the power-path management circuitry of the bq2423xH monitors the input current continuously. The OUT output is regulated to a fixed voltage (VO(REG)). The current into IN is shared between charging the battery and powering the system load at OUT. The bq2423xH has internal selectable current limits of 100 mA (USB100) and 500 mA (USB500) for charging from USB ports, as well as a resistor-programmable input current limit.

The bq2423xH is USB-IF compliant for the inrush current testing. The USB specification allows up to 10 μF to be hard-started, which establishes 50 μC as the maximum inrush charge value when exceeding 100 mA. The input current limit for the bq2423xH prevents the input current from exceeding this limit, even with system capacitances greater than 10 μF. The input capacitance to the device must be selected small enough to prevent a violation (<10 μF), as this current is not limited. Figure 12 demonstrates the start-up of the bq2423xH and compares it to the USB-IF specification.

bq24230H bq24232H usb_if_lus821.gif Figure 12. USB-IF Inrush Current Test

The input current limit selection is controlled by the state of the EN1 and EN2 pins as shown in Table 1. When using the resistor-programmable current limit, the input current limit is set by the value of the resistor connected from the ILIM pin to VSS and is given by the equation:

IIN-MAX = KILIM/RILIM

The input current limit is adjustable up to 500 mA. The valid resistor range is 3.2 kΩ to 8 kΩ.

When the IN source is connected, priority is given to the system load. The DPPM and Battery Supplement modes are used to maintain the system load. Figure 13 illustrates examples of the DPPM and supplement modes. These modes are explained in detail in the following sections.

Table 1. EN1/EN2 Settings

EN2 EN1 MAXIMUM INPUT CURRENT INTO IN PIN
0 0 100 mA. USB100 mode
0 1 500 mA. USB500 mode
1 0 Set by an external resistor from ILIM to VSS
1 1 Standby (USB suspend mode)

Input DPM Mode, VIN-DPM

The bq2423xH uses the VIN-DPM mode for operation from current-limited USB ports. When EN1 and EN2 are configured for USB100 (EN2=0, EN1=0) or USB500 (EN2=0, EN2=1) modes, the input voltage is monitored. If VIN falls to VIN-DPM, the input current limit is reduced to prevent the input voltage from falling further. This prevents the bq2423xH from crashing poorly designed or incorrectly configured USB sources.

DPPM Mode

When the sum of the charging and system load currents exceeds the preset maximum input current (programmed with EN1, EN2, and ILIM pins), the voltage at OUT decreases. Once the voltage on the OUT pin falls to VDPPM, the bq2423xH enters DPPM mode. In this mode, the charging current is reduced as the OUT current goes up in order to maintain the system output. Battery termination is disabled while in DPPM mode.

Battery Supplement Mode

While in DPPM mode, if the charging current falls to zero and the system load current increases beyond the programmed input current limit, the voltage at OUT reduces further. When the OUT voltage drops below the battery voltage by VBSUP1, the battery supplements the system load. The battery stops supplementing the system load when the voltage on the OUT pin rises above the battery voltage by VBSUP2.

During supplement mode, the battery supplement current is not regulated; however, a short-circuit protection circuit is built in. If during battery supplement mode, the voltage at OUT drops 250 mV below the BAT voltage, the OUT output is turned off if the overload exists after tDGL(SC2). The short-circuit recovery timer then starts counting. After tREC(SC2), OUT turns on and attempts to restart. If the short circuit remains, OUT is turned off and the counter restarts. Battery termination is disabled while in supplement mode.

bq24230H bq24232H bat2_fst_chg_lus810.gif Figure 13. bq2423xH DPPM and Battery Supplement Modes
(VOREG = 4.4 V, VBAT = 3.6 V, ILIM = 400 mA, ICHG = 150 mA)

Input Source Not Connected

When no source is connected to the IN input, OUT is powered strictly from the battery. During this mode, the current into OUT is unregulated, similar to Battery Supplement Mode; however, the short-circuit circuitry is active. If the OUT voltage falls below the BAT voltage by 250 mV for longer than tDGL(SC2), OUT is turned off. The short-circuit recovery timer then starts counting. After tREC(SC2), OUT turns on and attempts to restart. If the short-circuit remains, OUT is turned off and the counter restarts. This ON/OFF cycle continues until the overload condition is removed.

Battery Charging

Set CE low to initiate battery charging. First, the device checks for a short circuit on the BAT pin by sourcing IBAT(SC) to the battery and monitoring the voltage. When the BAT voltage exceeds VBAT(SC), the battery charging continues. The battery is charged in three phases: conditioning precharge, constant-current fast charge (current regulation), and a constant-voltage tapering (voltage regulation). In all charge phases, an internal control loop monitors the IC junction temperature and reduces the charge current if an internal temperature threshold is exceeded.

Figure 14 illustrates a normal Li-ion charge cycle using the bq2423xH:

bq24230H bq24232H three_phase_lus810.gif Figure 14. Normal Li-ion Charge Cycle

In the precharge phase, the battery is charged with the precharge current (IPRECHG). Once the battery voltage crosses the VLOWV threshold, the battery is charged with the fast-charge current (ICHG). As the battery voltage reaches VBAT(REG), the battery is held at a constant voltage of VBAT(REG) and the charge current tapers off as the battery approaches full charge. When the battery current reaches ITERM, the CHG pin indicates charging done by going high impedance.

Equation 1. IPRECHG = KPRECHG/RISET

Termination detection is disabled whenever the charge rate is reduced because of the actions of the thermal loop, the DPPM loop, or the VIN(LOW) loop.

The value of the fast-charge current is set by the resistor connected from the ISET pin to VSS, and is given by Equation 2:

Equation 2. ICHG = KISET/RISET

The charge current limit is adjustable from 25 mA to 500 mA. The valid resistor range is 1.74 kΩ to 34.8 kΩ. If ICHG is programmed as greater than the input current limit, the battery does not charge at the rate of ICHG, but at the slower rate of IIN(MAX) (minus the load current on the OUT pin, if any). In this case, the charger timers are proportionately slowed down.

bq24230H bq24232H charge_flow_lusBI8.gif Figure 15. Battery Charging Flow Diagram

Charge Current Translator

When the charger is enabled, internal circuits generate a current proportional to the charge current at the ISET input. The current out of ISET is 1/400 (±10%) of the charge current. This current, when applied to the external charge current programming resistor, RISET, generates an analog voltage that can be monitored by an external host to calculate the current sourced from BAT.

Equation 3. VISET=(ICHARGE / 400)×RISET

Battery Detection and Recharge

The bq2423xH automatically detects if a battery is connected or removed. Once a charge cycle is complete, the battery voltage is monitored. When the battery voltage falls below VRCH, the battery detection routine is run. The detection routine first applies IBAT(DET) for tDET to see if VBAT drops below VLOWV. If not, it indicates that the battery is still connected, but has discharged. If CE is low, the charger is turned on again to top off the battery. During this recharge cycle, the CHG output remains high-impedance as recharge cycles are not indicated by the CHG pin. If the BAT voltage falls below VLOWV during the battery detection test, it indicates that the battery has been removed or the protector is open. Next, the precharge current is applied for tDET to close the protector if possible. If the battery voltage does not rise above VRCH, it indicates that the protector is closed, or a battery has been inserted, and a new charge cycle begins. If the voltage rises above VRCH, the battery is determined missing and the detection routine continues. The battery detection runs until a battery is detected.

Termination Disable (TD Input, bq24230H)

The bq24230H contains a TD input that allows termination to be enabled/disabled. Connect TD to a logic high to disable charge termination. When termination is disabled, the device goes through the precharge, fast-charge, and CV phases, then remains in the CV phase. During the CV phase, the charger maintains the output voltage at BAT equal to VBAT(REG), and charging current does not terminate. BAT sources currents up to ICHG or IIN-MAX, whichever is less. Battery detection is not performed. The CHG output is high impedance once the current falls below ITERM and does not go low until the input power or CE are toggled. When termination is disabled, the precharge and fast-charge safety timers are also disabled. Battery pack temperature sensing (TS pin functionality) is also disabled if the TD pin is high and the TS pin is unconnected.

Adjustable Termination Threshold (ITERM Input, bq24232H)

The termination current threshold for the bq24232H is user-programmable. Set the termination current by connecting a resistor from ITERM to VSS. For USB100, mode (EN1 = EN2 = VSS), the termination current value is calculated as:

Equation 4. ITERM = 0.01 × RITERM / RISET

In the other input current limit modes (EN1 ≠ EN2), the termination current value is calculated as:

Equation 5. ITERM = 0.03 × RITERM / RISET

The termination current is programmable up to 50% of the fast-charge current. The RITERM resistor must be less than 15 kΩ. Leave ITERM unconnected to select the default internally set termination current.

Dynamic Charge Timers (TMR Input)

The bq2423xH devices contain internal safety timers for the precharge and fast-charge phases to prevent potential damage to the battery and the system. The timers begin at the start of the respective charge cycles. The timer values are programmed by connecting a resistor from TMR to VSS. The resistor value is calculated using the following equation:

Equation 6. tPRECHG = KTMR × RTMR
Equation 7. tMAXCHG = 10 × KTMR × RTMR

Leave TMR unconnected to select the internal default timers. Disable the timers by connecting TMR to VSS. Reset the timers by toggling the CE pin, or by toggling EN1, EN2 pin to put the device in and out of USB suspend mode (EN1 = HI, EN2 = HI).

Timers are suspended when the device is in thermal shutdown, and the timers are slowed proportionally to the charge current when the device enters thermal regulation. For the bq24230H, the timers are disabled when TD is connected to a high logic level.

During the fast-charge phase, several events increase the timer durations.

  1. The system load current activates the DPPM loop which reduces the available charging current
  2. The input current is reduced because the input voltage has fallen to VIN(LOW)
  3. The device has entered thermal regulation because the IC junction temperature has exceeded TJ(REG)

During each of these events, the internal timers are slowed down proportionately to the reduction in charging current. For example, if the charging current is reduced by half for 2 minutes, the timer clock is reduced to half the frequency and the counter counts half as fast resulting in only 1 minute of counted time.

Status Indicators (PGOOD, CHG)

The bq2423xH contains two open-drain outputs that signal its status. The PGOOD output signals when a valid input source is connected. PGOOD is low when (VBAT + VIN(DT)) < VIN < VOVP. When the input voltage is outside of this range, PGOOD is high impedance.

The CHG output signals when a new charge cycle is initiated. After a charge cycle is initiated, CHG goes low once the battery is above the short-circuit threshold. CHG goes high impedance once the charge current falls below ITERM. CHG remains high impedance until the input power is removed and reconnected or the CE pin is toggled. It does not signal subsequent recharge cycles.

Table 2. PGOOD Status Indicator

INPUT STATE PGOOD OUTPUT
VIN < VUVLO High-impedance
VUVLO < VIN < VIN(DT) + VBAT High-impedance
VIN(DT) + VBAT < VIN < VOVP Low
VIN > VOVP High-impedance

Table 3. CHG Status Indicator

CHARGE STATE CHG OUTPUT
Charging Low (first charge cycle)
Charging terminated High-impedance until power or CE is toggled
Recharging after termination High-impedance
Carging suspended by thermal loop Low (first charge cycle)
Safety timers expired Flashing at 2Hz
IC disabled or no valid input power High-impedance

Timer Fault

If the precharge timer expires before the battery voltage reaches VLOWV, the bq2423xH indicates a fault condition. Additionally, if the battery current does not fall to ITERM before the fast-charge timer expires, a fault is indicated. The CHG output flashes at approximately 2 Hz to indicate a fault condition.

Thermal Regulation and Thermal Shutdown

The bq2423xH contain a thermal regulation loop that monitors the die temperature. If the die temperature exceeds TJ(REG), the device automatically reduces the charging current to prevent the die temperature from increasing further. In some cases, the die temperature continues to rise despite the operation of the thermal loop, particularly under high VIN and heavy OUT system load conditions. Under these conditions, if the die temperature increases to TJ(OFF), the input FET Q1 is turned OFF. FET Q2 is turned ON to ensure that the battery still powers the load on OUT. Once the device die temperature cools by TJ(OFF-HYS), the input FET Q1 is turned on and the device returns to thermal regulation. Continuous overtemperature conditions result in a hiccup mode. Safety timers are slowed proportionally to the charge current in thermal regulation. Battery termination is disabled during thermal regulation and thermal shutdown.

Note that this feature monitors the die temperature of the bq2423xH. This is not synonymous with ambient temperature. Self-heating exists due to the power dissipated in the IC because of the linear nature of the battery charging algorithm and the LDO mode for OUT.

A modified charge cycle with the thermal loop active is shown in Figure 16:

bq24230H bq24232H mod_chg_cyc_lus810.gif Figure 16. Modified Charge Cycle With Thermal Loop Active

Battery Pack Temperature Monitoring

The bq2423xH features an external battery pack temperature monitoring input. The TS input connects to the NTC resistor in the battery pack to monitor battery temperature and prevent dangerous overtemperature conditions.

During charging, INTC is sourced to TS and the voltage at TS is continuously monitored. If, at any time, the voltage at TS is outside of the operating range (VCOLD to VHOT), charging is suspended. The timers maintain their values but suspend counting. When the voltage measured at TS returns to within the operation window, charging is resumed and the timers continue counting. When charging is suspended due to a battery pack temperature fault, the CHG pin remains low and continues to indicate charging.

For the bq24230H, battery pack temperature sensing is disabled when termination is disabled (TD = High) and the voltage at TS is greater than VDIS(TS). The battery pack temperature monitoring is disabled in all devices by connecting a 10-kΩ resistor from TS to VSS.

The allowed temperature range for a 103AT-2 type thermistor is 0°C to 50°C. However, the user can increase the range by adding two external resistors. See Figure 17 for the circuit. The values for Rs and Rp are calculated using the following equations:

Equation 8. bq24230H bq24232H EQ2_rs_lus821.gif
Equation 9. bq24230H bq24232H EQ3_rp_lus821.gif

Where:

RTH: Thermistor Hot Trip Value found in thermistor data sheet
RTC: Thermistor Cold Trip Value found in thermistor data sheet
VH: IC's Hot Trip Threshold = 0.3V nominal
VC: IC's Cold Trip Threshold = 2.1V nominal
ITS: IC's Output Current Bias = 75µA nominal
NTC Thermsitor Semitec 103AT-4

Rs and Rp 1% values were chosen closest to calculated values

COLD TEMP RESISTANCE AND TRIP THRESHOLD; Ω (°C) HOT TEMP RESISTANCE AND TRIP THRESHOLD; Ω (°C) EXTERNAL BIAS RESISTOR, RS (Ω) EXTERNAL BIAS RESISTOR, RP (Ω)
28000 (–0.6) 4000 (51) 0
28480 (–1) 3536 (55) 487 845000
28480 (–1) 3021 (60) 1000 549000
33890 (–5) 4026 (51) 76.8 158000
33890 (–5) 3536 (55) 576 150000
33890 (–5) 3021 (60) 1100 140000

RHOT and RCOLD are the thermistor resistance at the desired hot and cold temperatures, respectively. The temperature window cannot be tightened more than the thermistor connected to TS, it can only be extended.

bq24230H bq24232H ext_ts_lus821.gif Figure 17. Extended TS Temperature Thresholds

Device Functional Modes

Explanation of Deglitch Times and Comparator Hysteresis

Figures not to scale

bq24230H bq24232H pwr_up_lus810.gif Figure 18. Power Up, Power Down
bq24230H bq24232H prechg_lus810.gif Figure 19. Precharge to Fast-Charge, Fast- to Precharge Transition – tDGL1(LOWV), tDGL2(LOWV)
bq24230H bq24232H rechg_lus810.gif Figure 20. Recharge – tDGL(RCH)
bq24230H bq24232H shrt_cir_lus810.gif Figure 21. OUT Short-Circuit – Supplement Mode
bq24230H bq24232H batt_pack_lus810.gif Figure 22. Battery Pack Temperature Sensing – TS Pin. Battery Temperature Increasing