ZHCSK30B August   2019  – April 2020 AMC1336

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      简化原理图
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. Table 1.  Absolute Maximum Ratings
    2. Table 2.  ESD Ratings
    3. Table 3.  Recommended Operating Conditions
    4. Table 4.  Thermal Information
    5. Table 5.  Power Ratings
    6. Table 6.  Insulation Specifications
    7. Table 7.  Safety-Related Certifications
    8. Table 8.  Safety Limiting Values
    9. Table 9.  Electrical Characteristics
    10. Table 10. Switching Characteristics
    11. 6.1       Insulation Characteristics Curves
    12. 6.2       Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Input
      2. 7.3.2 Modulator
      3. 7.3.3 Isolation Channel Signal Transmission
      4. 7.3.4 Clock Input
      5. 7.3.5 Digital Output
    4. 7.4 Device Functional Modes
      1. 7.4.1 Output Behavior in Case of a Full-Scale Input
      2. 7.4.2 AVDD Diagnostics and Fail-Safe Output
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Digital Filter Usage
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
      4. 8.2.4 What to Do and What Not to Do
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 器件支持
      1. 11.1.1 器件命名规则
        1. 11.1.1.1 隔离相关术语
    2. 11.2 文档支持
      1. 11.2.1 相关文档
    3. 11.3 接收文档更新通知
    4. 11.4 社区资源
    5. 11.5 商标
    6. 11.6 静电放电警告
    7. 11.7 Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

5 Pin Configuration and Functions

DWV Package
8-Pin SOIC
Top View

Pin Functions

PIN I/O DESCRIPTION
NO. NAME
1 AVDD — Analog (high-side) power supply, 3.0 V to 5.5 V.
See the Power Supply Recommendations section for decoupling recommendations.
2 AINP I Noninverting analog input
3 AINN I Inverting analog input
4 AGND — Analog (high-side) ground reference
5 DGND — Digital (controller-side) ground reference
6 DOUT O Modulator bitstream output, updated with the rising edge of the clock signal present on CLKIN. Use the rising edge of the clock to latch the modulator bitstream at the input of the digital filter device.
7 CLKIN I Modulator clock input with internal pulldown resistor (typical value: 1 MΩ). The clock signal must be applied continuously for proper device operation; see the Clock Input section for additional details.
8 DVDD — Digital (controller-side) power supply, 2.7 V to 5.5 V.
See the Power Supply Recommendations section for decoupling recommendations.