ZHCSAM3B December 2012 – April 2022 ADS54T01
PRODUCTION DATA
- 1 特性
- 2 应用
- 3 说明
- 4 Revision History
- 5 Device Comparison
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 Test Pattern Output
- 8.3.2 Clock Inputs
- 8.3.3 SNR and Clock Jitter
- 8.3.4 Analog Inputs
- 8.3.5 Over-Range Indication
- 8.3.6 Interleaving Correction
- 8.3.7 High-Resolution Output Data
- 8.3.8 Low-Resolution Output Data
- 8.3.9 Full Speed – 7 Bit
- 8.3.10 Decimated Low-Resolution Output Data
- 8.3.11 Multi Device Synchronization
- 8.4 Device Functional Modes
- 8.5 Programming
- 8.6 Register Maps
- 9 Power Supply Recommendations
- 10Device and Documentation Support
- 11Mechanical, Packaging, and Orderable Information
7.10 Typical Characteristics
Typical values at TA = +25°C, full temperature range is TMIN = –40°C to TMAX = +85°C, ADC sampling rate = 750 Msps, 50% clock duty cycle, AVDD33 = 3.3 V, AVDDC/AVDD18/DVDD/DVDDLVDS/IOVDD = 1.8 V, –1-dBFS differential input, unless otherwise noted.
Figure 7-2 FFT for 10-MHz Input Signal (Auto On)
Figure 7-4 FFT for 230-MHz Input Signal (Auto On)
Figure 7-6 FFT for 450-MHz Input Signal (Auto On)
Figure 7-8 FFT for 700-MHz Input Signal (Auto On)
Figure 7-10 SFDR vs. Input Frequency
Figure 7-12 SFDR vs. Amplitude (fin = 230 MHz)
Figure 7-14 Tow Tone Performance Across Input Amplitude
(fin = 185 MHz)
Figure 7-16 SFDR vs. Vref (Auto Off)
Figure 7-18 SNR vs. Vref (Auto Off)
Figure 7-20 Performance Across Temperature (fin = 230
MHz)
Figure 7-22 Performance Across AVDD18 (fin = 230
MHz)
Figure 7-24 INL
Figure 7-26 CMRR Across Frequency
Figure 7-28 Power Across Sampling Frequency
Figure 7-3 FFT for 10-MHz Input Signal (Auto Off)
Figure 7-5 FFT for 230-MHz Input Signal (Auto
Off)
Figure 7-7 FFT for 450-MHz Input Signal (Auto
Off)
Figure 7-9 FFT for 700-MHz Input Signal (Auto
Off)
Figure 7-11 SNR vs. Input Frequency
Figure 7-13 SNR vs. Amplitude (fin = 230 MHz)
Figure 7-15 SFDR vs. Vref (Auto On)
Figure 7-17 SNR vs. Vref (Auto On)
Figure 7-19 Performance Across Input Common-Mode
Voltage
Figure 7-21 Performance Across AVDD33 (fin = 230
MHz)
Figure 7-23 Performance Across Clock Amplitude
Figure 7-25 DNL
Figure 7-27 PSRR Across Frequency
Figure 7-29 SFDR
Across Input and Sampling Frequencies (Auto
On)
Figure 7-30 SFDR
Across Input and Sampling Frequencies (Auto
Off)
Figure 7-31 SNR
Across Input and Sampling Frequencies (Auto
On)
Figure 7-32 SNR
Across Input and Sampling Frequencies (Auto
On)