ZHCSCV9A August 2014 – October 2014 ADS1120-Q1
PRODUCTION DATA.

| PIN | TYPE | DESCRIPTION | |
|---|---|---|---|
| NUMBER | NAME | ||
| 1 | SCLK | Digital input | Serial clock input |
| 2 | CS | Digital input | Chip select, active low. Connect to DGND if not used. |
| 3 | CLK | Digital input | External clock source pin. Connect to DGND if not used. |
| 4 | DGND | Digital | Digital ground |
| 5 | AVSS | Analog | Negative analog power supply |
| 6 | AIN3/REFN1 | Analog input | Analog input 3, negative reference input 1. Internal low-side power switch connected between AIN3/REFN1 and AVSS. Leave unconnected or tie to AVDD if not used. |
| 7 | AIN2 | Analog input | Analog input 2. Leave unconnected or tie to AVDD if not used. |
| 8 | REFN0 | Analog input | Negative reference input 0. Leave unconnected or tie to AVDD if not used. |
| 9 | REFP0 | Analog input | Positive reference input 0. Leave unconnected or tie to AVDD if not used. |
| 10 | AIN1 | Analog input | Analog input 1. Leave unconnected or tie to AVDD if not used. |
| 11 | AIN0/REFP1 | Analog input | Analog input 0, positive reference input 1. Leave unconnected or tie to AVDD if not used. |
| 12 | AVDD | Analog | Positive analog power supply |
| 13 | DVDD | Digital | Positive digital power supply |
| 14 | DRDY | Digital output | Data ready, active low. Leave unconnected or tie to DVDD using a weak pull-up resistor if not used. |
| 15 | DOUT/DRDY | Digital output | Serial data output combined with data ready, active low |
| 16 | DIN | Digital input | Serial data input |