ZHCSFU8B May 2016 – December 2021 ADC32RF80 , ADC32RF83
PRODUCTION DATA
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 0 | 0 | PDN SYSREF | 0 | 0 | PDN CHB | GLOBAL PDN |
| W-0h | W-0h | W-0h | R/W-0h | W-0h | R/W-0h | R/W-0h | R/W-0h |
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 7-5 | 0 | W | 0h | Must write 0 |
| 4 | PDN SYSREF | R/W | 0h | This bit powers down the SYSREF input buffer. 0 = Normal operation 1 = SYSREF input capture buffer is powered down and further SYSREF input pulses are ignored |
| 3-2 | 0 | W | 0h | Must write 0 |
| 1 | PDN CHB | R/W | 0h | This bit powers down channel B. 0 = Normal operation 1 = Channel B is powered down |
| 0 | GLOBAL PDN | R/W | 0h | This bit enables the global power-down. 0 = Normal operation 1 = Global power-down enabled |