ZHCSGK9A April 2017  – July 2017 TPS22971

PRODUCTION DATA. 

  1. 特性
  2. 应用
  3. 说明
  4. 修订历史记录
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1Absolute Maximum Ratings
    2. 6.2ESD Ratings
    3. 6.3Recommended Operating Conditions
    4. 6.4Thermal Information
    5. 6.5Electrical Characteristics
    6. 6.6Switching Characteristics
    7. 6.7Typical DC Characteristics
    8. 6.8Typical AC Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1Overview
    2. 8.2Functional Block Diagram
    3. 8.3Feature Description
      1. 8.3.1On and Off Control
      2. 8.3.2Controlled Turn-On
      3. 8.3.3Power Good (PG)
      4. 8.3.4Quick Output Discharge (QOD)
    4. 8.4Device Functional Modes
  9. Application and Implementation
    1. 9.1Application Information
      1. 9.1.1Thermal Consideration
      2. 9.1.2PG Pull Up Resistor
      3. 9.1.3Power Sequencing
    2. 9.2Typical Application
      1. 9.2.1Design Requirements
      2. 9.2.2Detailed Design Procedure
        1. 9.2.2.1Maximum Voltage Drop and On-Resistance
        2. 9.2.2.2Managing Inrush Current
      3. 9.2.3Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1Layout Guidelines
    2. 11.2Layout Example
  12. 12器件和文档支持
    1. 12.1文档支持
      1. 12.1.1相关文档
    2. 12.2接收文档更新通知
    3. 12.3社区资源
    4. 12.4商标
    5. 12.5静电放电警告
    6. 12.6Glossary
  13. 13机械、封装和可订购信息

Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

Application Information

Thermal Consideration

It is recommended to limit the junction temperature (TJ) to below 125°C. To calculate the maximum allowable dissipation, PD(max) for a given output current and ambient temperature, use Equation 6 as a guideline:

Equation 6. TPS22971 tps22971x-equation-06.gif

where

  • PD(max) is maximum allowable power dissipation
  • TJ(max) is maximum allowable junction temperature
  • TA is ambient temperature of the device
  • ΘJA is junction to air thermal impedance. See the Thermal Information section. This parameter is highly dependent upon board layout

PG Pull Up Resistor

The PG output is an open drain signal which connects to a voltage source through a pull up resistor RPU. The PG signal can be used to drive the enable pins of downstream devices, EN. PG is active high, and its voltage is given by Equation 7.

Equation 7. TPS22971 tps22971x-equation-07.gif

where

  • VOUT is the voltage where PG is tied to
  • IPG,LK is the leakage current into PG pin
  • IEN,LK is the leakage current into the EN pin driven by PG
  • RPU is the pull up resistance

VPG needs to be higher than VIH,MIN of the EN pin to be treated as logic high. The maximum RPU is determined by Equation 8.

Equation 8. TPS22971 tps22971x-equation-08.gif

When PG is disabled, with 1 mA current into PG pin (IPG = 1 mA), VPG.OL is less than 0.2 V and treated as logic low as long as VIL,MAX of the EN pin is greater than 0.2 V. The minimum RPU is determined by Equation 9.

Equation 9. TPS22971 tps22971x-equation-09.gif

RPU can be chosen within the range defined by RPU,MIN and RPU,MAX. RPU = 10 kΩ is used for characterization.

Power Sequencing

The TPS22971 has an integrated power good indicator which can be used for power sequencing. As shown in Figure 26, the switch to the second load is controlled by the PG signal from the first switch. This ensures that the power to load 2 is only enabled after the same power to load 1 is enabled after the first switch has turned on.

TPS22971 Power-Sequencing.gif Figure 26. Power Sequencing

Typical Application

TPS22971 TPS22971-typ-app.gif Figure 27. Typical Application Circuit

Design Requirements

For this design example, below, use the input parameters shown in Table 2.

Table 2. Design Parameters

DESIGN PARAMETEREXAMPLE VALUE
VIN 3.6 V
ILOAD10 mA
Load Capacitance (CL)33 μF
Maximum Voltage Drop1%
Maximum Inrush Current630 mA

Detailed Design Procedure

Maximum Voltage Drop and On-Resistance

At 3.6-V input voltage, with a maximum voltage drop tolerance of 1%, the TPS22971 has a typical RON of 6.7 mΩ. The rail is supplying 10 mA of current; the voltage drop for a rail is calculated based on Equation 10.

Equation 10. TPS22971 tps22971x-equation-10.gif
Equation 11. TPS22971 tps22971x-equation-11.gif

The maximum voltage drop is 1% which is 36 mV. The voltage drop caused by the load current across the on resistance is 0.067 mV.

Managing Inrush Current

When the switch is enabled, the output capacitors must be charged up from 0 V to VIN. This charge arrives in the form of inrush current. Given a load capacitance (CL) of 33 μF, an input voltage (VIN) of 3.6V and a maximum inrush (IINRUSH) of 630 mA, use Equation 12 and Equation 13 to solve for Slew Rate (SR).

Equation 12. TPS22971 tps22971x-equation-12.gif
Equation 13. TPS22971 tps22971x-equation-13.gif

Now that the desired slew rate has been calculated, use SR and VIN in in Equation 14 to calculate a CT capacitance value.

Equation 14. TPS22971 tps22971x-equation-14.gif

A capacitance value of 1007pF is a non-standard value therefore a 1000 pF CT capacitance is used moving forward.

The calculated CT value can be used with Equation 2 and Equation 4 to determine tON and tPG,ON, respectively as shown in Equation 15 and Equation 16.

Equation 15. TPS22971 tps22971x-equation-15.gif
Equation 16. TPS22971 tps22971x-equation-16.gif

Application Curves

TPS22971 3p6_cout33_ct0.png
VIN = 3.6 VVON = 3.6 VCIN = 1 µF
RL = OPENTA = 25°CCL = 33 µF
Figure 28. TPS22971 Inrush Current With CT = 0 pF
TPS22971 3p6_cout33_ct1000.png
VIN = 3.6 VVON = 3.6 VCIN = 1 µF
RL = OPENTA = 25°CCL = 33 µF
Figure 29. TPS22971 Inrush Current With CT = 1000 pF