TLV320ADC3101 支持数字麦克风且具有 miniDSP 的 92dB SNR 低功耗立体声 ADC | 德州仪器 TI.com.cn

TLV320ADC3101
此产品已上市,且可供购买。 可提供某些产品的较新替代品。
支持数字麦克风且具有 miniDSP 的 92dB SNR 低功耗立体声 ADC

 

Automotive AEC-Q100 Grade 2 qualified version available, see TLV320ADC3101-Q1.

描述

The TLV320ADC3101 device is a low-power, stereo audio analog-to-digital converter (ADC) supporting sampling rates from 8 kHz to 96 kHz with an integrated programmable-gain amplifier providing up to 40-dB analog gain or AGC. A programmable miniDSP is provided for custom audio processing. Front-end input coarse attenuation of 0 dB, –6 dB, or off, is also provided. The inputs are programmable in a combination of single-ended or fully differential configurations. Extensive register-based power control is available via an I2C interface, enabling mono or stereo recording. Low power consumption makes the TLV320ADC3101 ideal for battery-powered portable equipment.

The AGC programs to a wide range of attack (7 ms to 1.4 s) and decay (50 ms to 22.4 s) times. A programmable noise-gate function is included to avoid noise pumping. Low-latency IIR filters optimized for voice and telephony are available, as well as linear-phase FIR filters optimized for audio. Programmable IIR filters are also available and may be used for sound equalization, or to remove noise components. The audio serial bus can be programmed to support I2S, left-justified, right-justified, DSP, PCM, and TDM modes. The audio bus may be operated in either master or slave mode.

A programmable integrated PLL is included for flexible clock generation and provides support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, including the most popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system clocks.

特性

  • Stereo Audio ADC
    • 92-dBA Signal-to-Noise Ratio
    • Supports ADC Sample Rates From 8 kHz to
      96 kHz
  • Instruction-Programmable Embedded miniDSP
  • Flexible Digital Filtering With RAM Programmable
    Coefficient, Instructions, and Built-In Processing
    Blocks
    • Low-Latency IIR Filters for Voice
    • Linear Phase FIR Filters for Audio
    • Additional Programmable IIR Filters for EQ,
      Noise Cancellation or Reduction
    • Up to 128 Programmable ADC Digital Filter
      Coefficients
  • Six Audio Inputs With Configurable Automatic
    Gain Control (AGC)
    • Programmable in Single-Ended or Fully
      Differential Configurations
    • Can Be 3-Stated for Easy Interoperability With
      Other Audio ICs
  • Low Power Consumption and Extensive Modular
    Power Control:
    • 6-mW Mono Record, 8-kHz
    • 11-mW Stereo Record, 8-kHz
    • 10-mW Mono Record, 48-kHz
    • 17-mW Stereo Record, 48-kHz
  • Dual Programmable Microphone Bias
  • Programmable PLL for Clock Generation
  • I2C Control Bus
  • Audio Serial Data Bus Supports I2S, Left/Right-
    Justified, DSP, PCM, and TDM Modes
  • Digital Microphone Input Support
  • Two GPIOs
  • Power Supplies:
    • Analog: 2.6 V to 3.6 V
    • Digital: Core: 1.65 V to 1.95 V,
      I/O: 1.1 V–3.6 V
  • 4-mm × 4-mm 24-Pin RGE (VQFN)

参数

与其它产品相比 音频 ADC 邮件 下载到电子表格中
Part number 立即下单 ADC channels Analog inputs Digital audio interface Control interface Sampling rate (Max) (kHz) ADC SNR (Typ) (dB) Rating
TLV320ADC3101 立即下单 2     6     DSP
I2S
L
PCM
R
TDM    
I2C     96     92     Catalog    
PCM1870 无样片 2     2     DSP
I2S
L
R    
I2C
SPI    
50     90     Catalog    
PCM1870A 无样片 2     2     DSP
I2S
L
R    
I2C
SPI    
50     90     Catalog    
TLV320ADC3001 立即下单 2     3     L
R
I2S
DSP
TDM
PCM    
I2C     96     92     Catalog    
TLV320ADC3100 立即下单 2     2     DSP
I2S
L
PCM
R
TDM    
I2C     96     92     Catalog    
TLV320ADC3140 立即下单 4     4     I2S
L
TDM    
I2C
SPI    
768     106     Catalog    
TLV320ADC5140 立即下单 4     4     I2S
L
TDM    
I2C
SPI    
768     120     Catalog    
TLV320ADC6140 立即下单 4     4     I2S
L
TDM    
I2C
SPI    
768     122     Catalog