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时钟发生器

CDC7005

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高性能、低相位噪声、低偏移的时钟同步器（使参考时钟与 VCXO 同步）

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CDC7005

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产品详情

Function Clock generator Number of outputs 5 Output frequency (max) (MHz) 800 Core supply voltage (V) 3.3 Output supply voltage (V) 3.3 Input type LVCMOS, LVPECL Output type LVPECL Operating temperature range (°C) -40 to 85 Features Op-amp for active loop filter, Programmable delay Rating Catalog
Function Clock generator Number of outputs 5 Output frequency (max) (MHz) 800 Core supply voltage (V) 3.3 Output supply voltage (V) 3.3 Input type LVCMOS, LVPECL Output type LVPECL Operating temperature range (°C) -40 to 85 Features Op-amp for active loop filter, Programmable delay Rating Catalog
BGA (ZVA) 64 64 mm² 8 x 8 VQFN (RGZ) 48 49 mm² 7 x 7
  • High Performance 1:5 PLL Clock Synchronizer
  • Two Clock Inputs: VCXO_IN Clock Is Synchronized to REF_IN Clock
  • Synchronizes Frequencies up to 800 MHz (VCXO_IN)
  • Supports Five Differential LVPECL Outputs
  • Each Output Frequency Is Selectable by x1, /2, /4, /8, /16
  • All Outputs Are Synchronized
  • Integrated Low-Noise OPA for External Low-Pass Filter
  • Efficient Jitter Screening From Low PLL Loop Bandwidth
  • Low-Phase Noise Characteristic
  • Programmable Delay for Phase Adjustments
  • Predivider Loop BW Adjustment
  • SPI Controllable Division Setting
  • Power-Up Control Forces LVPECL Outputs to 3-State at VCC <1.5 V
  • 3.3-V Power Supply
  • Packaged In 64-Pin BGA (0,8 mm Pitch - ZVA) or 48-Pin QFN (RGZ)
  • Industrial Temperature Range –40°C to 85°C
  • High Performance 1:5 PLL Clock Synchronizer
  • Two Clock Inputs: VCXO_IN Clock Is Synchronized to REF_IN Clock
  • Synchronizes Frequencies up to 800 MHz (VCXO_IN)
  • Supports Five Differential LVPECL Outputs
  • Each Output Frequency Is Selectable by x1, /2, /4, /8, /16
  • All Outputs Are Synchronized
  • Integrated Low-Noise OPA for External Low-Pass Filter
  • Efficient Jitter Screening From Low PLL Loop Bandwidth
  • Low-Phase Noise Characteristic
  • Programmable Delay for Phase Adjustments
  • Predivider Loop BW Adjustment
  • SPI Controllable Division Setting
  • Power-Up Control Forces LVPECL Outputs to 3-State at VCC <1.5 V
  • 3.3-V Power Supply
  • Packaged In 64-Pin BGA (0,8 mm Pitch - ZVA) or 48-Pin QFN (RGZ)
  • Industrial Temperature Range –40°C to 85°C

The CDC7005 is a high-performance, low-phase noise, and low-skew clock synchronizer and jitter cleaner that synchronizes the voltage controlled crystal oscillator (VCXO) frequency to the reference clock. The programmable predividers M and N give a high flexibility to the frequency ratio of the reference clock to VCXO: VCXO_IN/REF_IN = (NxP)/M. The VCXO_IN clock operates up to 800 MHz. Through the selection of external VCXO and loop filter components, the PLL loop bandwidth and damping factor can be adjusted to meet different system requirements. Each of the five differential LVPECL outputs is programmable by the serial peripheral interface (SPI). The SPI allows individual control of frequency and enable/disable state of each output. The device operates in 3.3-V environment. The built-in latches ensure that all outputs are synchronized.

The CDC7005 is characterized for operation from –40°C to 85°C.

The CDC7005 is a high-performance, low-phase noise, and low-skew clock synchronizer and jitter cleaner that synchronizes the voltage controlled crystal oscillator (VCXO) frequency to the reference clock. The programmable predividers M and N give a high flexibility to the frequency ratio of the reference clock to VCXO: VCXO_IN/REF_IN = (NxP)/M. The VCXO_IN clock operates up to 800 MHz. Through the selection of external VCXO and loop filter components, the PLL loop bandwidth and damping factor can be adjusted to meet different system requirements. Each of the five differential LVPECL outputs is programmable by the serial peripheral interface (SPI). The SPI allows individual control of frequency and enable/disable state of each output. The device operates in 3.3-V environment. The built-in latches ensure that all outputs are synchronized.

The CDC7005 is characterized for operation from –40°C to 85°C.
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类型 标题 下载最新的英语版本 日期
* 数据表 3.3-V High Performance Clock Synthesizer & Jitter Cleaner 数据表 (Rev. L) 2009年 6月 4日
应用简报 Using The CDC7005 as a 1:5 PECL Buffer w/Programmable Divider Ratio (Rev. B) 2009年 12月 15日
应用手册 Basics of the CDC7005 Hold Function 2006年 4月 13日
EVM 用户指南 CDC7005 (BGA Package) EVM (Rev. E) 2006年 3月 28日
用户指南 CDC7005 (QFN Package) Evaluation Module Manual (Rev. B) 2006年 3月 28日
EVM 用户指南 CDC7005 (BGA Package) EVM (Rev. D) 2005年 12月 29日
用户指南 CDC7005 (QFN Package) Evaluation Module Manual (Rev. A) 2005年 12月 29日
用户指南 CDC7005 (QFN Package) Evaluation Module Manual 2005年 7月 20日
应用手册 Phase Noise (Jitter) Performance of CDC7005 With Different VCXOs (Rev. A) 2005年 7月 19日
EVM 用户指南 CDC7005EVM User Guide (Rev. C) 2005年 2月 17日
应用手册 Open Loop Phase-Noise Performance of CDC7005 at Various Frequencies 2004年 12月 17日
用户指南 TSW2000 Receive Clock JItter Cleaning EVM 2004年 6月 28日
应用手册 Implementing a CDC7005 Low Jitter Clock Solution for HIgh Speed High IF ADC Dev 2004年 6月 25日
产品概述 ADS5500 + CDC7005 Product Bulletin 2004年 6月 23日
产品概述 TSW2000: TLK1201A & CDC7005 2004年 6月 23日
应用手册 General Guidelines: CDC7005 as a Clock Synthesizer and Jitter Cleaner (Rev. A) 2003年 12月 16日
应用手册 General Guidelines: CDC7005 as a Clock Synthesizer and Jitter Cleaner 2003年 3月 21日

设计和开发

如需其他信息或资源，请点击以下任一标题进入详情页面查看（如有）。

评估板

CDC7005-EVM — CDC7005 评估模块

The CDC7005 is a high-performance, low phase noise and low skew clock synchronizer that synchronizes voltage controlled crystal oscillator (VCXO) frequency to an external reference clock; generates very low phase noise (jitter) clock.

The PLL loop bandwidth and damping factor can be adjusted to meet (...)

用户指南: PDF
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评估板

CDC7005QFN-EVM — 采用 QFN 封装的 CDC7005 评估模块

The CDC7005 is a high-performance, low phase noise and low skew clock synchronizer that synchronizes voltage controlled crystal oscillator (VCXO) frequency to an external reference clock; generates very low phase noise (jitter) clock.

The PLL loop bandwidth and damping factor can be adjusted to meet (...)

用户指南: PDF
TI.com 上无现货
评估板

CDCM7005BGA-EVM — 采用 BGA 封装的 CDCM7005 评估模块

The CDCM7005 is a high-performance, low phase noise and low skew clock synchronizer that synchronizes voltage controlled crystal oscillator (VCXO) frequency to an external reference clock; generates very low phase noise (jitter) clock.

The PLL loop bandwidth and damping factor can be adjusted to (...)

用户指南: PDF
TI.com 上无现货
评估板

CDCM7005QFN-EVM — 采用 QFN 封装的 CDCM7005 评估模块

TheCDCM7005QFN-EVM is an evaluation module designed to aid in evaluating the performance of the CDCM7005, which is a high-performance, low phase noise and low skew clock synchronizer that synchronizes voltage controlled crystal oscillator (VCXO) frequency to an external reference clock; generates (...)

用户指南: PDF
TI.com 上无现货
支持软件

SCAC037 — CDC7005 SPI Software with Labview 8.0 Runtime Engine

支持的产品和硬件

支持的产品和硬件

产品
时钟发生器
CDC7005 — 高性能、低相位噪声、低偏移的时钟同步器（使参考时钟与 VCXO 同步）
硬件开发
评估板
CDC7005-EVM — CDC7005 评估模块 CDC7005QFN-EVM — 采用 QFN 封装的 CDC7005 评估模块
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仿真模型

CDC7005 IBIS Model

SCAC033.ZIP (34 KB) - IBIS Model
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物料清单 (BOM)

TSW1000 EVM Bill of Materials

SLWR028.ZIP (166 KB)
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计算工具

CDC-CDCM7005-CALC — CDC7005 和 CDCM7005 PLL 环路带宽计算器

This tool helps to determine the right divider values (M, N & P) and to choose the filter type and components. This calculator will help to find out the appropriate loop bandwidth, phase margin, jitter peaking, etc. just varying the loop parameters like PFD frequency, filter components, Charge pump (...)
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光绘文件

CDC7005 EVM QFN Gerber Files

SCAC066.ZIP (537 KB)
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光绘文件

TSW1000 EVM Gerber Files

SLWC050.ZIP (532 KB)
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模拟工具

PSPICE-FOR-TI — 适用于 TI 设计和模拟工具的 PSpice®

PSpice® for TI 可提供帮助评估模拟电路功能的设计和仿真环境。此功能齐全的设计和仿真套件使用 Cadence® 的模拟分析引擎。PSpice for TI 可免费使用，包括业内超大的模型库之一，涵盖我们的模拟和电源产品系列以及精选的模拟行为模型。

借助 PSpice for TI 的设计和仿真环境及其内置的模型库，您可对复杂的混合信号设计进行仿真。创建完整的终端设备设计和原型解决方案，然后再进行布局和制造，可缩短产品上市时间并降低开发成本。

在 PSpice for TI 设计和仿真工具中，您可以搜索 TI (...)
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封装 引脚 下载
BGA (ZVA) 64 查看选项
VQFN (RGZ) 48 查看选项
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订购和质量

包含信息：
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息：
  • 制造厂地点
  • 封装厂地点

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