ZHCS834G June   2011  – March 2020 TPS7A63-Q1 , TPS7A6401-Q1

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
    1.     Device Images
      1.      固定输出电压选项
      2.      可调输出电压选项
  4. 修订历史记录
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1  Power Up, Reset Delay, and Reset Output
      2. 7.3.2  Adjustable Output Voltage
      3. 7.3.3  Chip Enable
      4. 7.3.4  Charge Pump Operation
      5. 7.3.5  Low-Power Mode
      6. 7.3.6  Undervoltage Shutdown
      7. 7.3.7  Low-Voltage Tracking
      8. 7.3.8  Integrated Fault Protection
      9. 7.3.9  Thermal Shutdown
      10. 7.3.10 Integrated Window Watchdog
        1. 7.3.10.1 Programmable-Window Watchdog
        2. 7.3.10.2 Watchdog Enable
        3. 7.3.10.3 Watchdog Service Signal
        4. 7.3.10.4 Watchdog Fault Outputs
        5. 7.3.10.5 Watchdog Initialization
        6. 7.3.10.6 Watchdog Operation
        7. 7.3.10.7 Watchdog Fault Conditions
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation With VIN Lower Than 4 V
      2. 7.4.2 Operation With VIN Larger Than 4 V
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Example
    2. 8.2 Typical Applications
      1. 8.2.1 Typical Application Using the TPS7A6333-Q1 or TPS7A6350-Q1
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Typical Application Using the TPS7A6401-Q1
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Power Dissipation and Thermal Considerations
        1. 10.1.1.1 Example
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 相关链接
    2. 11.2 接收文档更新通知
    3. 11.3 社区资源
    4. 11.4 商标
    5. 11.5 静电放电警告
    6. 11.6 Glossary
  12. 12机械、封装和可订购信息

Detailed Design Procedure

When using the TPS7A6333-Q1, TPS7A6350-Q1, TI recommends adding a 10-µF to 22-µF capacitor to the input to keep the input voltage stable. TI also recommends adding a 1-µF to 10-µF low ESR ceramic capacitor to get a stable output.

The reset delay time is set by an external capacitor (CDLY) to ground, capacitor value typical from 100 pF to
100 nF. Equation 1 provides the method for the calculation.

Connecting an external resistor to ground at the ROSC pin can set the duration of the watchdog window. Equation 4 provides the method for the calculation. Usually a 10-kΩ to 200-kΩ resistor can be used to set the time.