SNVSA75D November   2015  – May 2017

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Internal LDO Electrical Characteristics
    7. 7.7  Protection Electrical Characteristics
    8. 7.8  Power Line FET Control Electrical Characteristics
    9. 7.9  Current Sinks Electrical Characteristics
    10. 7.10 PWM Brightness Control Electrical Characteristics
    11. 7.11 Boost or SEPIC Converter Characteristics
    12. 7.12 Logic Interface Characteristics
    13. 7.13 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Integrated DC-DC Converter
      2. 8.3.2 Internal LDO
      3. 8.3.3 LED Current Sinks
        1. 8.3.3.1 Current Sink Configuration
        2. 8.3.3.2 Current Setting
        3. 8.3.3.3 Brightness Control
      4. 8.3.4 Power Line FET Control
      5. 8.3.5 Fault Detections
        1. 8.3.5.1 Adaptive DC-DC Voltage Control and Functionality of LED Fault Comparators
        2. 8.3.5.2 Overview of the Fault/Protection Schemes
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device States
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Typical Application for 2 LED Strings
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Inductor Selection
          2. 9.2.1.2.2 Output Capacitor Selection
          3. 9.2.1.2.3 Input Capacitor Selection
          4. 9.2.1.2.4 LDO Output Capacitor
          5. 9.2.1.2.5 Diode
          6. 9.2.1.2.6 Power Line Transistor
          7. 9.2.1.2.7 Input Current Sense Resistor
        3. 9.2.1.3 Application Curves
      2. 9.2.2 SEPIC Mode Application
        1. 9.2.2.1 Detailed Design Procedure
          1. 9.2.2.1.1 Inductor
          2. 9.2.2.1.2 Diode
          3. 9.2.2.1.3 Capacitor C1
        2. 9.2.2.2 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

6 Pin Configuration and Functions

PWP Package
20-Pin TSSOP
Top View
LP8862-Q1 pinout_SNVSA75.gif

Pin Functions

PIN TYPE(1) DESCRIPTION
NUMBER NAME
1 VIN A Input power pin as well as the positive input for an optional current sense resistor.
2 LDO A Output of internal LDO; connect a 1-μF decoupling capacitor between this pin and noise-free ground.
3 FSET A DC-DC (boost or SEPIC) switching-frequency-setting resistor; for normal operation, resistor value from 24 kΩ to 219 kΩ must be connected between this pin and ground.
4 VDDIO/EN I Enable input for the device as well as supply input (VDDIO) for digital pins
5 FAULT OD Fault signal output. If unused, this pin may be left floating.
6 SYNC I Input for synchronizing boost.
If synchronization is not used, connect this pin to GND to disable spread spectrum or to VDDIO/EN to enable spread spectrum.
7 PWM I PWM dimming input.
8 NC No internal connection
9 GND G Ground.
10 ISET A LED current setting resistor; for normal operation, resistor value from 24 kΩ to 129 kΩ must be connected between this pin and ground.
11 GND G Ground.
12 NC — No internal connection
13 NC — No internal connection
14 OUT2 A Current sink output.
This pin must be connected to GND if not used.
15 OUT1 A Current sink output.
This pin must be connected to GND if not used.
16 FB A DC-DC (boost or SEPIC) feedback input; for normal operation this pin must be connected to the middle of a resistor divider between VOUT and ground using feedback resistor values from 5 kΩ to 150 kΩ.
17 PGND G DC-DC (boost or SEPIC) power ground.
18 SW A DC-DC (boost or SEPIC) switch pin.
19 SD A Power-line FET control.
20 VSENSE_N A Input current sense pin.
(1) A: Analog pin, G: Ground pin, P: Power pin, I: Input pin, I/O: Input/Output pin, O: Output pin, OD: Open Drain pin